LT3763
22
3763fb
For more information www.linear.com/LT3763
applicaTions inForMaTion
where T
SW
is the switching period, L is the inductance
value, V
O
is the output voltage and R
S
is the sense resistor.
For most applications, a 4.7nF compensation capacitor
is adequate and provides excellent phase margin with
optimized bandwidth. Please refer to Table 6 for recom
-
mended compensation values.
Board Layout Considerations
Average current mode control
is relatively immune to the
switching noise associated with other types of control
schemes. Nevertheless, the high di/dt loop formed by input
Table 6. Recommended Compensation Component Values (V
CTRL2
= 2V)
V
IN
(V) V
O
(V) V
CTRL1
(V) I
L
(A) f
SW
(kHz) L (µH) R
S
(mΩ) R
C
(kΩ) C
C
(nF)
12 4 0.75 5 500 2.2 5 54.9 4.7
12 4 1.50 10 500 2.2 5 54.9 4.7
12 5 1.50 20 250 2.2 2.5 44.2 8.2
60 30 0.15 1 500 10 5 15.4 4.7
60 30 1.20 8 500 10 5 15.4 4.7
capacitors and switching MOSFETS should be minimized.
Placing the sense resistor as close as possible to the SENSE
+
and SENSE
–
pins also helps avoid noise issues. Due to sense
resistor ESL (equivalent series inductance), 10Ω resistors
in series with the SENSE
+
and SENSE
–
pins with a 33nF ca-
pacitor placed between the SENSE pins are recommended.
Utilizing a
good ground plane underneath the switching
components will minimize interplane noise coupling. To
dissipate the heat from the switching components, use a
large area for the switching node while keeping in mind
that this negatively affects the radiated noise.
