1
Features
• Serial Peripheral Interface (SPI) Compatible
• Supports SPI Modes 0 (0,0) and 3 (1,1)
• 128-byte Page Mode Only for Write Operations
• Low-voltage and Standard-voltage Operation
– 2.7 (V
CC
= 2.7V to 5.5V)
– 1.8 (V
CC
= 1.8V to 5.5V)
• 10 MHz (5V), 5MHz (2.7V) and 2 MHz (1.8V) Clock Rate
• Block Write Protection
• Protect 1/4, 1/2, or Entire Array
• Write Protect (WP) Pin and Write Disable Instructions for
both Hardware and Software Data Protection
• High Reliability
– Endurance: 100K Write Cycles
– Data Retention: >40 Years
• 8-lead PDIP, 8-lead EIAJ SOIC, 16-lead JEDEC SOIC, 8-lead Leadless Array Package,
and 8-lead SOIC Array Package (SAP)
• Die Sales: Wafer Form, Waffle Pack, and Bumped Wafers
Description
The AT25HP256/512 provides 262,144/524,288 bits of serial electrically erasable pro-
grammable read only memory (EEPROM) organized as 32,768/65,536 words of 8-bits
each. The device is optimized for use in many industrial and commercial applications
where high-speed, low-power, and low-voltage operation are essential. The
AT25HP256/512 is available in a space saving 8-lead PDIP (AT25HP256/512), 8-lead
EIAJ SOIC (AT25HP256), 16-lead JEDEC SOIC (AT25HP512), 8-lead Leadless Array
(AT25HP256/512) package, and 8-lead SOIC Array package (SAP). In addition, the
entire family is available in 2.7V (2.7V to 5.5V) and 1.8V (1.8V to 5.5V) versions.
Table 1. Pin Configurations
Pin Name Function
CS
Chip Select
SCK Serial Data Clock
SI Serial Data Input
SO Serial Data Output
GND Ground
VCC Power Supply
WP
Write Protect
HOLD
Suspends Serial Input
Rev. 1113L–SEEPR–3/06
SPI Serial
EEPROMs
256K (32,768 x 8)
512K (65,536 x 8)
AT25HP256
(1)
AT25HP512
Note: 1. Not recommended for
new design; please refer to
AT25256A datasheet.
8-lead SOIC
CS
SCK
SO
WP
HOLD
GND
VCC
1
2
3
4
8
7
6
5
SI
8-lead PDIP
CS
SCK
SO
WP
HOLD
GND
VCC
1
2
3
4
8
7
6
5
SI
CS
SCK
SO
WP
HOLD
GND
VCC
1
2
3
4
8
7
6
5
SI
8-lead Leadless Array
Bottom View
HOLD
SCK
SI
VCC
CS
SO
WP
GND
1
2
3
4
5
6
7
8
16-lead SOIC
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
CS
SO
NC
NC
NC
NC
WP
GND
VCC
HOLD
NC
NC
NC
NC
SCK
SI
8-lead SOIC Array Package
(SAP)
HOLD
SCK
SI
VCC
CS
SO
WP
GND
1
2
3
4
5
6
7
8