LTC3809-1
10
38091fc
In sleep mode, much of the internal circuitry is turned off,
reducing the quiescent current that the LTC3809-1 draws.
The load current is supplied by the output capacitor. As
the output voltage decreases, the EAMP increases the
I
TH
voltage. When the I
TH
voltage reaches 0.925V, the
SLEEP signal goes low and the controller resumes normal
operation by turning on the external P-channel MOSFET
on the next cycle of the internal oscillator.
When the controller is enabled for Burst Mode or pulse-
skipping operation, the inductor current is not allowed to
reverse. Hence, the controller operates discontinuously.
The reverse current comparator RICMP senses the
drain-to-source voltage of the bottom external N-channel
MOSFET. This MOSFET is turned off just before the inductor
current reaches zero, preventing it from going negative.
In forced continuous operation, the inductor current is
allowed to reverse at light loads or under large transient
conditions. The peak inductor current is determined by the
voltage on the I
TH
pin. The P-channel MOSFET is turned
on every cycle (constant frequency) regardless of the I
TH
pin voltage. In this mode, the effi ciency at light loads is
lower than in Burst Mode operation. However, continuous
mode has the advantages of lower output ripple and no
noise at audio frequencies.
When the MODE pin is set to the V
FB
Pin, the LTC3809-1
operates in PWM pulse-skipping mode at light loads. In
this mode, the current comparator ICMP may remain
tripped for several cycles and force the external P-channel
MOSFET to stay off for the same number of cycles. The
inductor current is not allowed to reverse (discontinuous
operation). This mode, like forced continuous operation,
exhibits low output ripple as well as low audible noise
and reduced RF interference as compared to Burst Mode
operation. However, it provides low current effi ciency
higher than forced continuous mode, but not nearly as
high as Burst Mode operation. During start-up or an
undervoltage condition (V
FB
≤ 0.54V), the LTC3809-1
operates in pulse-skipping mode (no current reversal
allowed), regardless of the state of the MODE pin.
Short-Circuit and Current Limit Protection
The LTC3809-1 monitors the voltage drop ΔV
SC
(between
the GND and SW pins) across the external N-channel
MOSFET with the short-circuit current limit comparator.
The allowed voltage is determined by:
ΔV
SC(MAX)
= A • 90mV
where A is a constant determined by the state of the IPRG
pin. Floating the IPRG pin selects A = 1; tying IPRG to V
IN
selects A = 5/3; tying IPRG to GND selects A = 2/3.
The inductor current limit for short-circuit protection is
determined by ΔV
SC(MAX)
and the on-resistance of the
external N-channel MOSFET:
I
V
R
SC
SC MAX
DS ON
=
Δ
()
()
Once the inductor current exceeds I
SC
, the short current
comparator will shut off the external P-channel MOSFET
until the inductor current drops below I
SC
.
Output Overvoltage Protection
As further protection, the overvoltage comparator (OVP)
guards against transient overshoots, as well as other more
serious conditions that may overvoltage the output. When
the feedback voltage on the V
FB
pin has risen 13.33%
above the reference voltage of 0.6V, the external P-channel
MOSFET is turned off and the N-channel MOSFET is turned
on until the overvoltage is cleared.
OPERATION
(Refer to Functional Diagram)
LTC3809-1
11
38091fc
Dropout Operation
When the input supply voltage (V
IN
) approaches the output
voltage, the rate of change of the inductor current while the
external P-channel MOSFET is on (ON cycle) decreases.
This reduction means that the P-channel MOSFET will
remain on for more than one oscillator cycle if the inductor
current has not ramped up to the threshold set by the
EAMP on the I
TH
pin. Further reduction in the input supply
voltage will eventually cause the P-channel MOSFET to be
turned on 100%; i.e., DC. The output voltage will then be
determined by the input voltage minus the voltage drop
across the P-channel MOSFET and the inductor.
Undervoltage Lockout
To prevent operation of the P-channel MOSFET below
safe input voltage levels, an undervoltage lockout is
incorporated in the LTC3809-1. When the input supply
voltage (V
IN
) drops below 2.25V, the external P- and
N-channel MOSFETs and all internal circuits are turned
off except for the undervoltage block, which draws only
a few microamperes.
Peak Current Sense Voltage Selection
and Slope Compensation (IPRG Pin)
When the LTC3809-1 controller is operating below 20%
duty cycle, the peak current sense voltage (between the
V
IN
and SW pins) allowed across the external P-channel
MOSFET is determined by:
Δ=VA
VV
SENSE MAX
ITH
()
–.07
10
where A is a constant determined by the state of the IPRG
pin. Floating the IPRG pin selects A = 1; tying IPRG to
V
IN
selects A = 5/3; tying IPRG to GND selects A = 2/3.
The maximum value of V
ITH
is typically about 1.98V, so
the maximum sense voltage allowed across the external
P-channel MOSFET is 125mV, 85mV or 204mV for the
three respective states of the IPRG pin.
However, once the controllers duty cycle exceeds 20%,
slope compensation begins and effectively reduces the
peak sense voltage by a scale factor (SF) given by the
curve in Figure 1.
The peak inductor current is determined by the peak sense
voltage and the on-resistance of the external P-channel
MOSFET:
I
V
R
PK
SENSE MAX
DS ON
=
Δ
()
()
OPERATION
(Refer to Functional Diagram)
Figure 1. Maximum Peak Current vs Duty Cycle
DUTY CYCLE (%)
10
SF = I/I
MAX
(%)
60
80
110
100
90
38091 F01
40
20
50
70
90
30
10
0
30
50
70
200
40
60
80
100
LTC3809-1
12
38091fc
The typical LTC3809-1 application circuit is shown in Figure
8. External component selection for the controller is driven
by the load requirement and begins with the selection of
the inductor and the power MOSFETs.
Power MOSFET Selection
The LTC3809-1’s controller requires two external power
MOSFETs: a P-channel MOSFET for the topside (main)
switch and a N-channel MOSFET for the bottom (synchro-
nous) switch. The main selection criteria for the power
MOSFETs are the breakdown voltage V
BR(DSS)
, threshold
voltage V
GS(TH)
, on-resistance R
DS(ON)
, reverse transfer
capacitance C
RSS
, turn-off delay t
D(OFF)
and the total gate
charge Q
G
.
The gate drive voltage is the input supply voltage. Since
the LTC3809-1 is designed for operation down to low input
voltages, a sublogic level MOSFET (R
DS(ON)
guaranteed at
V
GS
= 2.5V) is required for applications that work close to
this voltage. When these MOSFETs are used, make sure that
the input supply to the LTC3809-1 is less than the absolute
maximum MOSFET V
GS
rating, which is typically 8V.
The P-channel MOSFETs on-resistance is chosen based
on the required load current. The maximum average load
current I
OUT(MAX)
is equal to the peak inductor current
minus half the peak-to-peak ripple current I
RIPPLE
. The
LTC3809-1’s current comparator monitors the drain-to-
source voltage V
DS
of the top P-channel MOSFET, which
is sensed between the V
IN
and SW pins. The peak inductor
current is limited by the current threshold, set by the voltage
on the I
TH
pin, of the current comparator. The voltage on
the I
TH
pin is internally clamped, which limits the maximum
current sense threshold ΔV
SENSE(MAX)
to approximately
125mV when IPRG is fl oating (85mV when IPRG is tied
low; 204mV when IPRG is tied high).
The output current that the LTC3809-1 can provide is
given by:
I
V
R
I
OUT MAX
SENSE MAX
DS ON
RIPPLE
()
()
()
=
Δ
2
APPLICATIONS INFORMATION
where I
RIPPLE
is the inductor peak-to-peak ripple current
(see Inductor Value Calculation).
A reasonable starting point is setting ripple current I
RIPPLE
to be 40% of I
OUT(MAX)
. Rearranging the above equation
yields:
R
V
I
for Duty C
DS ON MAX
SENSE MAX
OUT MAX
()
()
()
=
Δ
5
6
yycle <20%
However, for operation above 20% duty cycle, slope
compensation has to be taken into consideration to select
the appropriate value of R
DS(ON)
to provide the required
amount of load current:
RSF
V
I
DS ON MAX
SENSE MAX
OUT MAX
()
()
()
••=
Δ
5
6
where SF is a scale factor whose value is obtained from
the curve in Figure 1.
These must be further derated to take into account the
signifi cant variation in on-resistance with temperature. The
following equation is a good guide for determining the re-
quired R
DS(ON)MAX
at 25°C (manufacturers specifi cation),
allowing some margin for variations in the LTC3809-1 and
external component values:
RSF
V
I
DS ON MAX
SENSE MAX
OUT MAX
()
()
()
•.•
=
Δ
5
6
09
ρρ
T
The ρ
T
is a normalizing term accounting for the temperature
variation in on-resistance, which is typically about 0.4%/°C,
as shown in Figure 2. Junction-to-case temperature T
JC
is
about 10°C in most applications. For a maximum ambi-
ent temperature of 70°C, using ρ
80°C
~ 1.3 in the above
equation is a reasonable choice.
The N-channel MOSFETs on resistance is chosen based
on the short-circuit current limit (I
SC
). The LTC3809-
1’s short-circuit current limit comparator monitors the
drain-to-source voltage V
DS
of the bottom N-channel
MOSFET, which is sensed between the GND and SW pins.

LTC3809EDD-1#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators No Rsense, Low EMI DC/DC Controller in DFN
Lifecycle:
New from this manufacturer.
Delivery:
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