A3974SEDTR-T

DMOS Dual Full-Bridge PWM Motor Driver
A3974
9
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Current Sensing. To minimize inaccuracies in sensing the
I
TRIP
current level caused by ground-trace IR drops, the sense
resistor should have an independent ground return to a ground
terminal of the device. For low-value sense resistors, the IR
drops in the PCB sense traces of the resistor can be signi cant
and should be taken into account. The use of sockets should be
avoided as they can introduce variation in R
S
due to their contact
resistance.
The maximum value of R
S
is given as R
S
= 0.5/I
TRIPMAX
.
Braking. The braking function is implemented by driving the
device in slow-decay mode via serial port bit D13, enabling
synchronous recti cation via bits D11 and D12, and applying
an enable chop command with the combination of D14 and the
ENABLE input terminal. Because it is possible to drive current
in both directions through the DMOS switches, this con gura-
tion effectively shorts out the motor-generated BEMF as long as
the ENABLE chop mode is asserted. It is important to note that
the internal PWM current-control circuit will not limit the cur-
rent when braking, because the current does not ow through the
sense resistor. The maximum brake current can be approximated
by V
BEMF
/R
L
. Care should be taken to ensure that the maximum
ratings of the device are not exceeded in worst-case braking situ-
ations of high speed and high inertial loads.
A. Minimum Data Setup Time .........................................15 ns
B. Minimum Data Hold Time ...........................................10 ns
C. Minimum Setup Strobe to Clock Rising Edge ............50 ns
D. Minimum Clock High Pulse Width .............................50 ns
E. Minimum Clock Low Pulse Width ..............................50 ns
F. Minimum Setup Clock Rising Edge to Strobe .............50 ns
G. Minimum Strobe Pulse Width .....................................50 ns
APPLICATIONS INFORMATION
Thermal protection. Circuitry turns off all drivers when the
junction temperature reaches 165°C typically. It is intended only
to protect the device from failures due to excessive junction
temperatures and should not imply that output short circuits are
permitted. Thermal shutdown has a hysteresis of approximately
15°C.
Layout. The printed wiring board should use a heavy ground
plane. For optimum electrical and thermal performance, the
driver should be soldered directly onto the board. The ground
side of R
S
should have an individual path to a ground terminal of
the device. This path should be as short as is possible physically
and should not have any other components connected to it. The
load supply terminal, V
BB
, should be decoupled with an electro-
lytic capacitor (>47 μF is recommended) placed as close to the
device as is possible.
Serial Port Write Timing Operation. Data is clocked into
shift register on the rising edge of CLOCK signal. Normally,
STROBE will be held high, and only will be brought low to
initiate a write cycle. Refer to diagram below and speci cation
table for timing requirements.
DMOS Dual Full-Bridge PWM Motor Driver
A3974
10
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
Terminal List
Terminal Name Terminal Description Terminal Number
GND Power and logic ground terminals 1, 2
SENSE
1
Sense resistor terminal for bridge 1 3
NC No (internal) connection 4, 5
OUT
1A
DMOS H-bridge 1 – output A 6
NC No (internal) connection 7
STROBE Logic input for serial Interface 8
CLOCK Logic input for serial Interface 9
DATA Logic input for serial Interface 10
GND Power and logic ground terminals 11, 12, 13
REF
1
G
m
reference input voltage – bridge 1 14
REF
2
G
m
reference input voltage – bridge 2 15
LOGIC SUPPLY V
DD
, the low voltage (typically 5 V) supply 16
NC No (internal) connection 17
OUT
2A
DMOS H-bridge 2 – output A 18
NC No (internal) connection 19, 20
SENSE
2
Sense resistor pin for bridge 2 21
GND Power and logic ground terminals 22, 23, 24
LOAD SUPPLY
2
V
BB2
, the high current, 20 V to 50 V,
supply for bridge 2 25
ENABLE
2
Logic input for bridge 2 – enable control 26
NC No (internal) connection 27
OUT
2B
DMOS H-bridge 2 – output B 28
NC No (internal) connection 29
V
REG
Regulator decoupling capacitor (typ. 0.22 μF) 30
SLEEP Logic input for SLEEP mode 31
OSC Logic-level oscillator (square wave) input 32
GND Power and logic ground terminals 33, 34, 35
CP Reservoir capacitor (typically 0.22 μF) 36
CP1 & CP2 The charge pump capacitor (typically 0.22 μF) 37 & 38
NC No (internal) connection 39
OUT
1B
DMOS H-bridge 1 – output B 40
NC No (internal) connection 41
ENABLE
1
Logic input for bridge 1 – enable control 42
LOAD SUPPLY
1
V
BB1
, the high current, 20 V to 50 V,
supply for bridge 1 43
GND Power and logic ground terminals 44
DMOS Dual Full-Bridge PWM Motor Driver
A3974
11
Allegro MicroSystems, Inc.
115 Northeast Cutoff
Worcester, Massachusetts 01615-0036 U.S.A.
1.508.853.5000; www.allegromicro.com
2144
A
Internally fused pins 44, 1 and 2; 11-13; 22-24; and 33-35
Dimensions exclusive of mold flash, gate burrs, and dambar protrusions
Exact case and lead configuration at supplier discretion within limits shown
A
Terminal #1 mark area
For Reference Only
(reference JEDEC MS-018 AC)
Dimensions in millimeters
C
SEATING
PLANE
0.51
4.57 MAX
16.59 ±0.08
16.59 ±0.08
7.75 ±0.36
7.75 ±0.36
7.75 ±0.367.75 ±0.36
C0.10
44X
0.74 ±0.08
17.53 ±0.13
17.53 ±0.13
1.27
0.43 ±0.10
Package EB, 44-pin PLCC
Copyright ©2001-2008, Allegro MicroSystems, Inc.
The products described here are manufactured under one or more U.S. patents or U.S. patents pending.
Allegro MicroSystems, Inc. reserves the right to make, from time to time, such de par tures from the detail spec i fi ca tions as may be required to per-
mit improvements in the per for mance, reliability, or manufacturability of its products. Before placing an order, the user is cautioned to verify that the
information being relied upon is current.
Allegro’s products are not to be used in life support devices or systems, if a failure of an Allegro product can reasonably be expected to cause the
failure of that life support device or system, or to affect the safety or effectiveness of that device or system.
The in for ma tion in clud ed herein is believed to be ac cu rate and reliable. How ev er, Allegro MicroSystems, Inc. assumes no re spon si bil i ty for its use;
nor for any in fringe ment of patents or other rights of third parties which may result from its use.
For the latest version of this document, visit our website:
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A3974SEDTR-T

Mfr. #:
Manufacturer:
Description:
IC MOTOR DRIVER 4.5V-5.5V 44PLCC
Lifecycle:
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