Data Sheet AD8203
Rev. D | Page 15 of 20
GAIN TRIM
Figure 45 shows a method for incremental gain trimming by
using a trim potentiometer and external resistor R
EXT
.
The following approximation is useful for small gain ranges:
ΔG(10 MΩ/R
EXT
)%
Thus, the adjustment range is ±2% for R
EXT
= 5 MΩ; ±10% for
R
EXT
= 1 MΩ, and so on.
5V
OUT
R
EXT
GAIN TRIM
20k MIN
V
CM
V
DIFF
2
V
DIFF
2
NC = NO CONNECT
GND
NC
–IN
+IN
A1
+V
S
A2
OUT
AD8203
05013-018
Figure 45. Incremental Gain Trim
Internal Signal Overload Considerations
When configuring gain for values other than 14, the maximum
input voltage with respect to the supply voltage and ground
must be considered, since either the preamplifier or the output
buffer reaches its full-scale output (approximately V
S
0.2 V)
with large differential input voltages. The input of the AD8203
is limited to (V
S
0.2)/7 for overall gains ≤ 7, since the pre-
amplifier, with its fixed gain of ×7, reaches its full-scale output
before the output buffer. For gains greater than 7, the swing at
the buffer output reaches its full scale first and limits the
AD8203 input to (V
S
0.2)/G, where G is the overall gain.
LOW-PASS FILTERING
In many transducer applications, it is necessary to filter the
signal to remove spurious high frequency components, includ-
ing noise, or to extract the mean value of a fluctuating signal
with a peak-to-average ratio (PAR) greater than unity. For
example, a full-wave rectified sinusoid has a PAR of 1.57, a
raised cosine has a PAR of 2, and a half-wave sinusoid has a
PAR of 3.14. Signals having large spikes can have PARs of
10 or more.
When implementing a filter, the PAR should be considered so
that the output of the AD8203 preamplifier (A1) does not clip
before A2, since this nonlinearity would be averaged and appear
as an error at the output. To avoid this error, both amplifiers
should be made to clip at the same time. This condition is
achieved when the PAR is no greater than the gain of the sec-
ond amplifier (2 for the default configuration). For example, if a
PAR of 5 is expected, the gain of A2 should be increased to 5.
Low-pass filters can be implemented in several ways by using
the features provided by the AD8203. In the simplest case, a
single-pole filter (20 dB/decade) is formed when the output of
A1 is connected to the input of A2 via the internal 100 kΩ
resistor by strapping Pin 3, Pin 4, and a capacitor added from
this node to ground, as shown in Figure 46. If a resistor is added
across the capacitor to lower the gain, the corner frequency
increases; it should be calculated using the parallel sum of the
resistor and 100 kΩ.
5V
V
CM
V
DIFF
2
V
DIFF
2
NC = NO CONNECT
C
GND
NC
–IN
+IN
A1
+V
S
A2
OUT
AD8203
05013-019
OUTPUT
f
C
=
1
2πC10
5
C IN FARADS
Figure 46. Single-Pole, Low-Pass Filter Using the Internal 100 kΩ Resistor
If the gain is raised using a resistor, as shown in Figure 44, the
corner frequency is lowered by the same factor as the gain is
raised. Thus, using a resistor of 200 kΩ (for which the gain
would be doubled), the corner frequency is now 0.796 Hz µF
(0.039 µF for a 20 Hz corner frequency).
5V
V
CM
V
DIFF
2
V
DIFF
2
NC = NO CONNECT
C
GND
NC
–IN
+IN
A1
+V
S
A2
OUT
AD8203
005013-020
OUT
C
255k
f
C
(Hz) = 1/C(µF)
Figure 47. 2-Pole, Low-Pass Filter
A 2-pole filter (with a roll-off of 40 dB/decade) can be implemented
using the connections shown in Figure 47. This is a Sallen-Key
form based on a ×2 amplifier. It is useful to remember that a 2-pole
filter with a corner frequency f
2
and a 1-pole filter with a corner at f
1
have the same attenuation at the frequency (f
2
2
/f
1
). The attenuation
at that frequency is 40 log (f
2
/f
1
), which is illustrated in Figure 48.
Using the standard resistor value shown and equal capacitors (see
Figure 47), the corner frequency is conveniently scaled at 1 Hz µF
(0.05 µF for a 20 Hz corner). A maximally flat response occurs
when the resistor is lowered to 196 k and the scaling is then
1.145 Hz µF. The output offset is raised by approximately 5 mV
(equivalent to 250 µV at the input pins).
AD8203 Data Sheet
Rev. D | Page 16 of 20
40log (f
2
/f
1
)
f
1
ATTENUATION
f
2
f
2
2
/f
1
FREQUENCY
A 1-POLE FILTER, CORNER f
1
, AND
A 2-POLE FILTER, CORNER f
2
, HAVE
THE SAME ATTENUATION –40log (f
2
/f
1
)
AT FREQUENCY f
2
2
/f
1
20dB/DECADE
40dB/DECADE
05013-021
Figure 48. Comparative Responses of 1-Pole and 2-Pole Low-Pass Filters
HIGH LINE CURRENT SENSING WITH LPF AND
GAIN ADJUSTMENT
Figure 49 is another refinement of Figure 2, including gain
adjustment and low-pass filtering.
GND
NC
–IN
+IN
A1
+V
S
A2
OUT
AD8203
5V
INDUCTIVE
LOAD
POWER
DEVICE
4-TERM
SHUNT
CLAMP
DIODE
BATTERY
14V
NC = NO CONNECT COMMON
05013-022
C
OUT
4V/AMP
5% CALIBRATION RANGE
f
C
(Hz) = 0.767Hz/C(µF)
(0.22µF FOR f
C
= 3.6Hz)
V
OS/IB
NULL
133k
20k
Figure 49. High Line Current Sensor Interface;
Gain = ×40, Single-Pole Low-Pass Filter
A power device that is either on or off controls the current in
the load. The average current is proportional to the duty cycle
of the input pulse and is sensed by a small value resistor. The
average differential voltage across the shunt is typically 100 mV,
although its peak value is higher by an amount that depends on
the inductance of the load and the control frequency. The
common-mode voltage, conversely, extends from roughly 1 V
above ground for the on condition to about 1.5 V above the
battery voltage for the off condition. The conduction of the
clamping diode regulates the common-mode potential applied
to the device. For example, a battery spike of 20 V may result in
an applied common-mode potential of 21.5 V to the input of
the devices.
To produce a full-scale output of 4 V, a gain ×40 is used, adjust-
able by ±5% to absorb the tolerance in the shunt. There is
sufficient headroom to allow 10% overrange (to 4.4 V). The
roughly triangular voltage across the sense resistor is averaged
by a 1-pole low-pass filter, shown in Figure 49, set with a corner
frequency of 3.6 Hz, which provides about 30 dB of attenuation
at 100 Hz. A higher rate of attenuation can be obtained using a
2-pole filter with f
C
= 20 Hz, as shown in Figure 50. Although
this circuit uses two separate capacitors, the total capacitance is
less than half that needed for the 1-pole filter.
GND
NC
–IN
+IN
A1
+V
S
A2
OUT
AD8203
5V
INDUCTIVE
LOAD
POWER
DEVICE
4-TERM
SHUNT
CLAMP
DIODE
BATTERY
14V
NC = NO CONNECT COMMON
05013-023
f
C
(Hz) = 1/C(µF)
(0.05µF FOR f
C
= 20Hz)
C
OUTPUT
93k
C
301k
50k
Figure 50. 2-Pole Low-Pass Filter
DRIVING CHARGE REDISTRIBUTION ADCS
When driving CMOS ADCs, such as those embedded in popu-
lar microcontrollers, the charge injection (ΔQ) can cause a
significant deflection in the output voltage of the AD8203.
Though generally of short duration, this deflection may persist
until after the sample period of the ADC has expired due to the
relatively high open-loop output impedance (21 kΩ) of the
AD8203. Including an R-C network in the output can signifi-
cantly reduce the effect. The capacitor helps to absorb the
transient charge, effectively lowering the high frequency output
impedance of the AD8203. For these applications, the output
signal should be taken from the midpoint of the
R
LAG
to C
LAG
combination, as shown in Figure 51.
Since the perturbations from the analog-to-digital converter are
small, the output impedance of the AD8203 appears to be low. The
transient response, therefore, has a time constant governed by the
product of the two LAG components, C
LAG
× R
LAG
. For the values
shown in Figure 51, this time constant is programmed at approxi-
mately 10 µs. Therefore, if samples are taken at several tens of
microseconds or more, there is negligible charge stack-up.
+IN
–IN
10k
10k
AD8203
5V
R
LAG
1k
C
LAG
0.01µF
MICROPROCESSOR
A/D
A2
2
4 7
5
05013-024
Figure 51. Recommended Circuit for Driving CMOS A/D
Data Sheet AD8203
Rev. D | Page 17 of 20
OUTLINE DIMENSIONS
COMPLIANT TO JEDEC STANDARDS MO-187-AA
0.80
0.55
0.40
4
8
1
5
0.65 BSC
0.40
0.25
1.10 MAX
3.20
3.00
2.80
COPLANARITY
0.10
0.23
0.09
3.20
3.00
2.80
5.15
4.90
4.65
PIN 1
IDENTIFIER
15° MAX
0.95
0.85
0.75
0.15
0.05
10-07-2009-B
Figure 52. 8-Lead Mini Small Outline Package [MSOP]
(RM-8)
Dimensions shown in millimeters
CONTROLLING DIMENSIONS ARE IN MILLIMETERS; INCH DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF MILLIMETER EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
COMPLIANT TO JEDEC STANDARDS MS-012-AA
012407-A
0.25 (0.0098)
0.17 (0.0067)
1.27 (0.0500)
0.40 (0.0157)
0.50 (0.0196)
0.25 (0.0099)
45°
1.75 (0.0688)
1.35 (0.0532)
SEATING
PLANE
0.25 (0.0098)
0.10 (0.0040)
4
1
8 5
5.00 (0.1968)
4.80 (0.1890)
4.00 (0.1574)
3.80 (0.1497)
1.27 (0.0500)
BSC
6.20 (0.2441)
5.80 (0.2284)
0.51 (0.0201)
0.31 (0.0122)
COPLANARITY
0.10
Figure 53. 8-Lead Standard Small Outline Package [SOIC_N]
Narrow Body
(R-8)
Dimensions shown in millimeters and (inches)
ORDERING GUIDE
Model
1
Temperature Range Package Description Package Outline Branding
AD8203YRMZ 40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 JXA
AD8203YRMZ-RL −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 JXA
AD8203YRMZ-R7 −40°C to +125°C 8-Lead Mini Small Outline Package [MSOP] RM-8 JXA
AD8203YRZ 40°C to +125°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
AD8203YRZ-RL −40°C to +125°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
AD8203YRZ-R7 −40°C to +125°C 8-Lead Standard Small Outline Package [SOIC_N] R-8
1
Z = RoHS Compliant part.

AD8203YRMZ

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Current Sense Amplifiers High Common-Mode VTG SGL-Supply
Lifecycle:
New from this manufacturer.
Delivery:
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