NTB0102 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved.
Product data sheet Rev. 4 — 23 January 2013 17 of 26
NXP Semiconductors
NTB0102
Dual supply translating transceiver; auto direction sensing; 3-state
13.3 Input driver requirements
For correct operation, the device driving the data I/Os of the NTB0102 must have a
minimum drive capability of 2 mA See Figure 11
for a plot of typical input current versus
input voltage.
13.4 Power-up
During operation V
CC(A)
must never be higher than V
CC(B)
, however during power-up
V
CC(A)
V
CC(B)
does not damage the device, so either power supply can be ramped up
first. There is no special power-up sequencing required. The NTB0102 includes circuitry
that disables all output ports when either V
CC(A)
or V
CC(B)
is switched off.
13.5 Enable and disable
An output enable input (OE) is used to disable the device. Setting OE = LOW causes all
I/Os to assume the high-impedance OFF-state. The disable time (t
dis
with no external
load) indicates the delay between when OE goes LOW and when outputs actually
become disabled. The enable time (t
en
) indicates the amount of time the user must allow
for one one-shot circuitry to become operational after OE is taken HIGH. To ensure the
high-impedance OFF-state during power-up or power-down, pin OE should be tied to
GND through a pull-down resistor, the minimum value of the resistor is determined by the
current-sourcing capability of the driver.
13.6 Pull-up or pull-down resistors on I/O lines
As mentioned previously the NTB0102 is designed with low static drive strength to drive
capacitive loads of up to 70 pF. To avoid output contention issues, any pull-up or
pull-down resistors used must be above 50 k. For this reason the NTB0102 is not
recommended for use in open drain driver applications such as 1-Wire or I
2
C-bus. For
these applications, the NTS0102 level translator is recommended.
V
T
: input threshold voltage of the NTB0102 (typically V
CCI
/ 2).
V
D
: supply voltage of the external driver.
Fig 11. Typical input current versus input voltage graph
001aal922
V
T
/4 kΩ
−(V
D
− V
T
)/4 kΩ
I
I
V
I
