Philips Semiconductors Product data
P89C60X2/61X2
80C51 8-bit Flash microcontroller family
64KB Flash, 512B/1024B RAM
2003 Sep 11
13
Table 1.
CLOCK MODE CONFIG BIT (FX2) X2 bit in CKCON DESCRIPTION
erased 0 12-clock mode (default)
erased 1 6-clock mode
programmed x 6-clock mode
NOTE:
1. Default clock mode after ChipErase is set to 12-clock.
FFFF
C000
8000
4000
2000
0000
PROGRAM
ADDRESS
BOOT ROM
(1 kB)
SU01673
P89C60X2
P89C61X2
BLOCK 1
BLOCK 0
BLOCK 3
BLOCK 2
BLOCK 5
BLOCK 4
BLOCK 7
BLOCK 6
BLOCK 9
BLOCK 8
BLOCK 11
BLOCK 10
BLOCK 13
BLOCK 12
BLOCK 15
BLOCK 14
Each block is
4 kbytes in size
Figure 1. Flash Memory Configuration
Power-On Reset Code Execution
The P89C60X2/61X2 contains a special Flash register, the STATUS
BYTE. At the falling edge of reset, the P89C60X2/61X2 examines
the contents of the Status Byte. If the Status Byte is set to zero,
power-up execution starts at location 0000H, which is the normal
start address of the user’s application code. When the Status Byte is
set to a value other than zero, the factory masked-ROM ISP boot
loader is invoked. The factory default for the Status Byte is FFh.
Once set to 00h, the Status Byte can only be changed back to FFh
by a full-chip erase operation when using ISP.
Hardware Activation of the Boot Loader
The boot loader can also be executed by holding PSEN LOW,
EA
greater than V
IH
(such as +5 V), and ALE HIGH (or not connected)
at the falling edge of RESET. This is the same effect as having a
non-zero status byte. This allows an application to be built that will
normally execute the end user’s code but can be manually forced
into ISP operation.
After programming the Flash, the status byte should be programmed
to zero in order to allow execution of the user’s application code
beginning at address 0000H.
Philips Semiconductors Product data
P89C60X2/61X2
80C51 8-bit Flash microcontroller family
64KB Flash, 512B/1024B RAM
2003 Sep 11
14
+5 V (+12 V tolerant)
+5 V
TxD
RxD
V
SS
V
PP
V
CC
TxD
RxD
RST
XTAL2
XTAL1
SU01674
V
SS
V
CC
P89C60X2
P89C61X2
Figure 2. In-System Programming with a Minimum of Pins
In-System Programming (ISP)
The In-System Programming (ISP) is performed without removing
the microcontroller from the system. The In-System Programming
(ISP) facility consists of a series of internal hardware resources
coupled with internal firmware to facilitate remote programming of
the P89C60X2/61X2 through the serial port. This firmware is
provided by Philips and embedded within each P89C60X2/61X2
device.
The Philips In-System Programming (ISP) facility has made in-circuit
programming in an embedded application possible with a minimum
of additional expense in components and circuit board area.
The ISP function uses five pins: TxD, RxD, V
SS
, V
CC
, and V
PP
(see
Figure 2). Only a small connector needs to be available to interface
your application to an external circuit in order to use this feature.
The V
PP
supply should be adequately decoupled and V
PP
not
allowed to exceed datasheet limits.
Free ISP software is available from the Embedded Systems
Academy: “FlashMagic”
1. Direct your browser to the following page:
http://www.esacademy.com/software/flashmagic/
2. Download Flashmagic
3. Execute “flashmagic.exe” to install the software
Using the In-System Programming (ISP)
The ISP feature allows for a wide range of baud rates to be used in
your application, independent of the oscillator frequency. It is also
adaptable to a wide range of oscillator frequencies. This is
accomplished by measuring the bit-time of a single bit in a received
character. This information is then used to program the baud rate in
terms of timer counts based on the oscillator frequency. The ISP
feature requires that an initial character (an uppercase U) be sent to
the P89C60X2/61X2 to establish the baud rate. The ISP firmware
provides auto-echo of received characters.
Once baud rate initialization has been performed, the ISP firmware
will only accept Intel Hex-type records. Intel Hex records consist of
ASCII characters used to represent hexadecimal values and are
summarized below:
:NNAAAARRDD..DDCC<crlf>
In the Intel Hex record, the “NN” represents the number of data
bytes in the record. The P89C60X2/61X2 will accept up to 16 (10H)
data bytes. The “AAAA” string represents the address of the first
byte in the record. If there are zero bytes in the record, this field is
often set to 0000. The “RR” string indicates the record type. A
record type of “00” is a data record. A record type of “01” indicates
the end-of-file mark. In this application, additional record types will
be added to indicate either commands or data for the ISP facility.
The maximum number of data bytes in a record is limited to 16
(decimal). ISP commands are summarized in Table 2.
As a record is received by the P89C60X2/61X2, the information in
the record is stored internally and a checksum calculation is
performed. The operation indicated by the record type is not
performed until the entire record has been received. Should an error
occur in the checksum, the P89C60X2/61X2 will send an “X” out the
serial port indicating a checksum error. If the checksum calculation
is found to match the checksum in the record, then the command
will be executed. In most cases, successful reception of the record
will be indicated by transmitting a “.” character out the serial port
(displaying the contents of the internal program memory is an
exception).
In the case of a Data Record (record type 00), an additional check is
made. A “.” character will NOT be sent unless the record checksum
matched the calculated checksum and all of the bytes in the record
were successfully programmed. For a data record, an “X” indicates
that the checksum failed to match, and an “R” character indicates
that one of the bytes did not properly program. It is necessary to
send a type 02 record (specify oscillator frequency) to the
P89C60X2/61X2 before programming data.
The ISP facility was designed to that specific crystal frequencies
were not required in order to generate baud rates or time the
programming pulses. The user thus needs to provide the
P89C60X2/61X2 with information required to generate the proper
timing. Record type 02 is provided for this purpose.
Philips Semiconductors Product data
P89C60X2/61X2
80C51 8-bit Flash microcontroller family
64KB Flash, 512B/1024B RAM
2003 Sep 11
15
Table 2. Intel-Hex Records Used by In-System Programming
RECORD TYPE COMMAND/DATA FUNCTION
00 Program Data
:nnaaaa00dd....ddcc
Where:
nn = number of bytes (hex) in record
aaaa = memory address of first byte in record
dd....dd = data bytes
cc = checksum
Example:
:10008000AF5F67F0602703E0322CFA92007780C3FD
01 End of File (EOF), no operation
:xxxxxx01cc
Where:
xxxxxx = required field, but value is a “don’t care”
cc = checksum
Example:
:00000001FF
03 Miscellaneous Write Functions
:nnxxxx03ffssddcc
Where:
nn = number of bytes (hex) in record
xxxx = required field, but value is a “don’t care”
03 = Write Function
ff = subfunction code
ss = selection code
dd = data input (as needed)
cc = checksum
Subfunction Code = 04 (Set Status Byte to 00h)
ff = 04
ss = don’t care
Example:
:020000030400F7 set status byte to 00h (device executes user code after Reset)
Subfunction Code = 05 (Program Security Bits)
ff = 05
ss = 00 program security bit 1 (inhibit writing to Flash)
01 program security bit 2 (inhibit Flash verify)
02 program security bit 3 (disable external memory)
Example:
:020000030501F5 program security bit 2
Subfunction Code = 06 (Program Flash X2 bit)
ff = 06
ss = 02 program FX2 bit (dd = 80) 6–clk. mode enabled
dd = data
Example 1:
:0300000306028072 program FX2 bit (enable 6–clk. mode)

P89C60X2BA/00,512

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC MCU 8BIT 64KB FLASH 44PLCC
Lifecycle:
New from this manufacturer.
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