Dual LVCMOS / LVTTL-to-Differential
2.5V / 3.3V LVPECL Translator
85322Data Sheet
©2016 Integrated Device Technology, Inc Revision D January 20, 20161
GENERAL DESCRIPTION
The 85322 is a Dual LVCMOS / LVTTL-to-
Differential 2.5V / 3.3V LVPECL translator. The 85322 has
selectable single ended clock inputs. The single ended
clock input accepts LVCMOS or LVTTL input levels and
translate them to 2.5V / 3.3V LVPECL levels. The small
outline 8-pin SOIC package makes this device ideal for ap-
plications where space, high performance and low power are
important.
FEATURES
Two differential 2.5V/3.3V LVPECL outputs
Selectable CLK0, CLK1 LVCMOS/LVTTL clock inputs
CLK0 and CLK1 can accepts the following input levels:
LVCMOS or LVTTL
Maximum output frequency: 267MHz
Part-to-part skew: 250ps (maximum)
3.3V operating supply voltage
(operating range 3.135V to 3.465V)
2.5V operating supply voltage
(operating range 2.375V to 2.625V)
0°C to 70°C ambient operating temperature
Lead-Free package available
BLOCK DIAGRAM PIN ASSIGNMENT
85322
8-Lead SOIC
3.90mm x 4.92mm x 1.37mm body package
M Package
Top View
Q0
nQ0
Q1
nQ1
1
2
3
4
Q0
nQ0
Q1
nQ1
CLK0
CLK1
VCC
CLK0
CLK1
V
EE
8
7
6
5
85322 Data Sheet
©2016 Integrated Device Technology, Inc Revision D January 20, 20162
TABLE 1. PIN DESCRIPTIONS
TABLE 2. PIN CHARACTERISTICS
Number Name Type Description
1, 2 Q0, nQ0 Output Differential output pair. LVPECL interface levels.
3, 4 Q1, nQ1 Output Differential output pair. LVPECL interface levels.
5V
EE
Power Negative supply pin.
6 CLK1 Input Pullup LVCMOS / LVTTL clock input.
7 CLK0 Input Pullup LVCMOS / LVTTL clock input.
8V
CC
Power Positive supply pin.
NOTE: Pullup refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
C
IN
Input Capacitance 4 pF
R
PULLUP
Input Pullup Resistor 51
kΩ
85322 Data Sheet
©2016 Integrated Device Technology, Inc Revision D January 20, 20163
TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, V
CC
= 3.3V±5%, TA = 0°C TO 70°C
TABLE 3B. LVCMOS / LVTTL DC CHARACTERISTICS, V
CC
= 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input High Voltage CLK0, CLK1 2 3.765 V
V
IL
Input Low Voltage CLK0, CLK1 -0.3 1.3 V
I
IH
Input High Current CLK0, CLK1 V
CC
= V
IN
= 3.465V 5 µA
I
IL
Input Low Current CLK0, CLK1 V
CC
= V
IN
= 3.465V -150 µA
TABLE 3C. LVPECL DC CHARACTERISTICS, V
CC
= 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
OH
Output High Voltage; NOTE 1 V
CC
= V
IN
= 3.465V V
CC
- 1.4 V
CC
- 0.9 V
V
OL
Output Low Voltage; NOTE 1 V
CC
= V
IN
= 3.465V V
CC
- 2.0 V
CC
- 1.7 V
V
SWING
Peak-to-Peak Output Voltage Swing 0.65 1.0 V
NOTE 1: Outputs terminated with 50Ω to V
CC
- 2V.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
CC
Positive Supply Voltage 3.135 3.3 3.465 V
I
EE
Power Supply Current 25 mA
ABSOLUTE MAXIMUM RATINGS
Supply Voltage, V
CC
4.6V
Inputs, V
I
-0.5V to V
CC
+ 0.5 V
Outputs, I
O
Continuous Current 50mA
Surge Current 100mA
Package Thermal Impedance, θ
JA
112.7°C/W (0 lfpm)
Storage Temperature, T
STG
-65°C to 150°C
NOTE: Stresses beyond those listed under Absolute
Maximum Ratings may cause permanent damage to the
device. These ratings are stress specifi cations only. Functional
operation of product at these conditions or any conditions
beyond those listed in the DC Characteristics or AC Charac-
teristics is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect product reliability.
TABLE 4A. AC CHARACTERISTICS, V
CC
= 3.3V±5%, TA = 0°C TO 70°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
MAX
Output Frequency 267 MHz
t
PD
Propagation Delay; NOTE 1
ƒ
267MHz
0.6 1.8 ns
tsk(pp) Part-to-Part Skew; NOTE 2, 3 250 ps
t
R
/ t
F
Output Rise/Fall Time 20% to 80% @ 50MHz 300 700 ps
odc Output Duty Cycle 40 60 %
All parameters measured at 133MHz unless noted otherwise.
NOTE 1: Measured from V
CC
/2 of the input to the differential output crossing point.
NOTE 2: Defi ned as skew between outputs on different devices operating at the same supply voltages
and with equal load conditions. Using the same type of inputs on each device, the outputs are measured
at the differential cross points.
NOTE 3: This parameter is defi ned in accordance with JEDEC Standard 65.

85322AMLF

Mfr. #:
Manufacturer:
IDT
Description:
Clock Buffer Dual LVTTL/LVCMOS to LVPECL Translator
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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