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9ERS3125BKLF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22
IDT
TM
/ICS
TM
Embedded 56-Pin Industrial Temperature Range CK505 Compatible Clock 1612—08/19/09
ICS9ERS3125
Embedded 56-Pin Industrial Temperature Range CK505 Compatible Clock
10
Datasheet
FS
L
C
2
B0b7
FS
L
B
1
B0b6
FS
L
A
1
B0b5
CPU
MHz
SRC
MHz
PCI
MHz
REF
MHz
USB
MHz
DOT
MHz
0 0 0 266.66
0 0 1 133.33
0 1 0 200.00
0 1 1 166.66
1 0 0 333.33
1 0 1 100.00
1 1 0 400.00
111
1. FS
L
A and FS
L
B are low-threshold inputs.Please see V
IL_FS
and V
IH_FS
specifications in
the Input/Supply/Common Output Parameters Table for correct values.
Also refer to the Test Clarification Table.
2. FS
L
C is a three-level input. Please see the V
IL_FS
and V
IH_FS
specifications in the Input/Supply/Common Output Parameters Table for correct values.
Table 1: CPU Fre
q
uenc
y
Select Table
96.00100.00 33.33 14.318 48.00
Reserved
27FIX/LCDT/SRCT_LR1/SE1 27SS/LCDC/SRCC_LR1/SE2
Spread
MHz MHz %
0
000 0
0
0 0 0 1 100.00 100.00 SRCCLK1 from SRC_MAIN
0
0 0 1 0 100.00 100.00 -0.50% LCDCLK from PLL1
0
0 0 1 1 100.00 100.00 -1% LCDCLK from PLL1
0
0 1 0 0 100.00 100.00 -1.50% LCDCLK from PLL1
0
0 1 0 1 100.00 100.00 +/-0.25% LCDCLK from PLL1
0
0 1 1 0 100.00 100.00 +/-0.5% LCDCLK from PLL1
0
0 1 1 1 N/A N/A N/A N/A
0
1 0 0 0 24.576 24.576 None 24.576Mhz on SE1 and SE2
0
1 0 0 1 24.576 98.304 None 24.576Mhz on SE1, 98.304Mhz on SE2
0
1 0 1 0 98.304 98.304 None 98.304Mhz on SE1 and SE2
0
1 0 1 1 27.000 27.000 None 27Mhz on SE1 and SE2
0
1 1 0 0 25.000 25.000 None 25Mhz on SE1 and SE2
0
110 1 N/A
0
1 1 1 0 N/A N/A N/A N/A
0
1 1 1 1 N/A N/A N/A N/A
1
0 0 0 0 N/A N/A N/A
1
0 0 0 1 N/A N/A N/A
1
001 0
27MHz_nonSS
27MHz_SS -0.5%
1
001 1
27MHz_nonSS
27MHz_SS
-1%
1
010 0
27MHz_nonSS
27MHz_SS
-1.5%
1
010 1
27MHz_nonSS
27MHz_SS
-2%
1
011 0
27MHz_nonSS
27MHz_SS
-0.75%
1
011 1
27MHz_nonSS
27MHz_SS
-1.25%
1
100 0
27MHz_nonSS
27MHz_SS -1.75%
1
100 1
27MHz_nonSS
27MHz_SS
+-0.5%
1
101 0
27MHz_nonSS
27MHz_SS
+-0.75%
1
101 1 N/A N/A
1
110 0 N/A N/A
1
110 1 N/A N/A
1
111 0 N/A N/A
1 111 1 N/A N/A
Note: Mode 00000 ~ 00110 on Table 2 only applies when SRC_MAIN source is from PLL5.
PLL1 & PLL2 disabled
B1b1B1b4 B1b3 B1b2
Table 2: 27FIX/LCDT/SRCT_LR1/SE1, 27SS/LCDC/SRCC_LR1/SE2 Confi
g
uration
27_SEL
Comment
IDT
TM
/ICS
TM
Embedded 56-Pin Industrial Temperature Range CK505 Compatible Clock 1612—08/19/09
ICS9ERS3125
Embedded 56-Pin Industrial Temperature Range CK505 Compatible Clock
11
Datasheet
Table 3: IO_Vout select table
B9b2 B9b1 B9b0 IO_Vout
000
0.3V
001
0.4V
010
0.5V
011
0.6V
100
0.7V
101
0.8V
110
0.9V
1 1 1 1.0V
Table 4: Device ID table
000 0
9LRS3125BIK
000 1 Reserved
001 0 Reserved
001 1 Reserved
010 0 Reserved
010 1 Reserved
011 0 Reserved
011 1 Reserved
110 0 Reserved
110 1 Reserved
111 0 Reserved
111 1 Reserved
110 0 Reserved
110 1 Reserved
111 0 Reserved
111 1 Reserved
CommentB8b7 B8b6 B8b5 B8b4
IDT
TM
/ICS
TM
Embedded 56-Pin Industrial Temperature Range CK505 Compatible Clock 1612—08/19/09
ICS9ERS3125
Embedded 56-Pin Industrial Temperature Range CK505 Compatible Clock
12
Datasheet
PD# CPU_STOP# PCI_STOP# PEREQ#
SMBus
Register
OE
CPU0 CPU0# CPU1 CPU1# CPU2 CPU2#
1 1 1 X Enable Running Running Running Running Running Running
0 X X X Enable Low/20K Low Low/20K Low Low/20K Low
1 0 X X Enable High Low High Low High Low
1 X X X Disable Low/20K Low Low/20K Low Low/20K Low
Low/20K Low Running Running Low/20K Low
CPU Power Management Table
M1
DOT Power Management Table
PD# CPU_STOP# PCI_STOP# PEREQ#
SMBus
Register
OE
DOT DOT#
1 X 1 X Enable Running Running
0 X X X Enable Low/20K Low
1 X 0 X Enable Running Running
1 X X X Enable Running Running
1 X X X Disable Low/20K Low
Low/20K LowM1
PD# CPU_STOP# PCI_STOP# PEREQ#
SMBus
Register
OE
PCIF/PCI
Free-Run
PCIF/PCI
Stoppable
USB48 REF 27M SE
1 X 1 X Enable Running Running Running Running Running Running
0 X X X Enable Low Low Low Low Low Low
1 X 0 X Enable Running Low Running Running Running Running
1 X X X Disable Low Low Low Low Low Low
Low Low Low Low Low Low
Singled-Ended Power Management Table
M1
PCIEX, LCD Power Management Table
PD# CPU_STOP# PCI_STOP# PEREQ#
SMBus
Register
OE
PCIeT PCIeC PCIeT PCIeC LCD LCD # LCD LCD # SATA SATA# SATA SATA#
1 X 1 0 Enable Running Running Running Running Running Running Running Running Running Running Running Running
0 X X X Enable Low/20K Low Low/20K Low Low/20K Low Low/20K Low Low/20K Low Low/20K Low
1 X 0 0 Enable Running Running High Low Running Running High Low Running Running High Low
1 X X 1 Enable Running Running Low/20K Low Running Running Running Running Running Running Running Running
1 X X X Disable Low/20K Low Low/20K Low Low/20K Low Low/20K Low Low/20K Low Low/20K Low
Low/20K Low Low/20K Low Low/20K Low Low/20K Low Low/20K Low Low/20K Low
Free-Run Stoppable Free-Run Stoppable
M1
Free-Run Stoppable
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22

9ERS3125BKLF

Mfr. #:
Buy 9ERS3125BKLF
Manufacturer:
Description:
Clock Synthesizer / Jitter Cleaner EMBEDDED CK505 COMPATIBLE CLOCK
Lifecycle:
New from this manufacturer.
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