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DS2175S+

P1-P3P4-P6P7-P9P10-P12
DS2175
7 of 12
RECOMMENDED DC OPERATING CONDITIONS (0°C TO 70°C)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
Logic 1 V
IH
2.0 V
DD
+0.3 V
Logic 0 V
IL
-0.3 +0.8 V
Supply V
DD
4.5 5.5 V
CAPACITANCE (t
A
=25°C)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
Input Capacitance C
IN
5
P
F
Output Capacitance C
OUT
7
P
F
DC ELECTRICAL CHARACTERISTICS (0°C TO 70°C; V
DD
=5V±10%)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
Supply Current I
DD
9 16 mA 1,2
Input Leakage I
IL
-1.0 +1.0 µA
Output Current @ 2.4V I
OH
-1.0 mA 3
Output Current @ 0.4V I
OL
+4.0 mA 4
NOTES:
1. SYSCLK = RCLK = 2.048 MHz
2. Outputs open
3. All outputs except SLIP , which is open collector
4. All outputs
DS2175
8 of 12
AC ELECTRICAL CHARACTERISTICS (0°C TO 70°C; V
DD
=5V±10%)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
RCLK Period t
RCLK
200 ns
RCLK, SYSCLK Rise and
Fall Times
t
R,
t
F
20 ns
RCLK Pulse Width t
RWH,
t
RWL
100 ns
SYSCLK Pulse Width t
SWH,
t
SWL
100 ns
SYSCLK Period t
SYSCLK
200 ns
RMSYNC Setup to RCLK
Falling
t
SC
20 t
RWH
-5 ns
SFSYNC Setup to
SYSCLK Falling
t
SC
20 t
SWH
-5 ns
RMSYNC, SFSYNC,
ALN Pulse Width
t
PW
50 ns
RSER Setup from RCLK
Falling
t
SD
50 ns
RSER Hold from RCLK
Falling
t
HD
50 ns
Propagation Delay
SYSCLK to SSER
t
PVD
75 ns
Propagation Delay
SYSCLK to SMSYNC
High
t
PSS
75 ns
Propagation Delay
SYSCLK or RCLK to
SLIP Low, FSD
Low/High
t
PS
100 ns
ALN Setup to SFSYNC
Rising
t
SR
500 ns
NOTES:
1. Measured at V
IH
=2.0V, V
IL
–0.8V, and 10 ns maximum rise and fall times.
2. Output load capacitance = 100 pF.
DS2175
9 of 12
RECEIVE AC TIMING DIAGRAM Figure 6
SYSTEM AC TIMING DIAGRAM Figure 7
P1-P3P4-P6P7-P9P10-P12

DS2175S+

Mfr. #:
Buy DS2175S+
Manufacturer:
Maxim Integrated
Description:
Network Controller & Processor ICs T1/CEPT Elastic Store
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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