ISL6269B
9
FN6280.3
November 17, 2014
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Theory of Operation
Modulator
The ISL6269B is a hybrid of fixed frequency PWM control and
variable frequency hysteretic control. Intersil’s R3™ Technology can
simultaneously affect the PWM switching frequency and PWM duty
cycle in response to input voltage and output load transients. The
term “Ripple” in the name “Robust Ripple Regulator” refers to the
converter output inductor ripple current, not the converter output
ripple voltage. The R3™ Modulator synthesizes an AC signal V
R
,
which is an ideal representation of the output inductor ripple
current. The duty-cycle of V
R
is the result of charge and discharge
current through a ripple capacitor C
R
. The current through C
R
is
provided by a transconductance amplifier g
m
that measures the VIN
and VO pin voltages. The positive slope of V
R
can be written as:
The negative slope of V
R
can be written as:
Where g
m
is the gain of the transconductance amplifier.
A window voltage V
W
is referenced with respect to the error
amplifier output voltage V
COMP
, creating an envelope into which
the ripple voltage V
R
is compared. The amplitude of V
W
is set by
a resistor connected across the FSET and GND pins. The V
R,
V
COMP
and V
W
signals feed into a window comparator in which
V
COMP
is the lower threshold voltage and V
W
is the higher
threshold voltage. Figure 1 shows PWM pulses being generated
as V
R
traverses the V
W
and V
COMP
thresholds. The PWM
switching frequency is proportional to the slew rates of the
positive and negative slopes of V
R;
the PWM switching frequency
is inversely proportional to the voltage between V
W
and V
COMP.
Power-On Reset
The ISL6269B is disabled until the voltage V
VCC
has increased
above the rising power-on reset (POR) V
VCC_THR
threshold voltage.
The controller will become once again disabled when the voltage
V
VCC
decreases below the falling POR V
VCC_THF
threshold voltage.
EN, Soft-Start and PGOOD
The ISL6269B uses a digital soft-start circuit to ramp the output
voltage of the converter to the programmed regulation setpoint
at a predictable slew rate. The slew rate of the soft-start
sequence has been selected to limit the in-rush current through
the output capacitors as they charge to the desired regulation
voltage. When the EN pin is pulled above the rising EN threshold
voltage V
ENTHR
the PGOOD soft-start delay t
SS
begins and the
output voltage begins to rise. The output voltage enters regulation
in approximately 1.5ms and the PGOOD pin goes to high
impedance once t
SS
has elapsed.
The PGOOD pin indicates when the converter is capable of
supplying regulated voltage. The PGOOD pin is an undefined
impedance if
V
VCC
has not reached the rising POR threshold
V
VCC_THR
, or if V
VCC
is below the falling POR threshold V
VCC_THF
.
The ISL6269B features a unique fault-identification capability
that can drastically reduce troubleshooting time and effort. The
pull-down resistance of the PGOOD pin corresponds to the fault
status of the controller. During soft-start or if an undervoltage
fault occurs, the PGOOD pull-down resistance is 95Ω, or 30Ω for
an overcurrent fault, or 60Ω for an overvoltage fault.
V
RPOS
g
m
V
IN
V
OUT
–=
(EQ. 1)
V
RNEG
g
m
V
OUT
=
(EQ. 2)
Ripple Capacitor Voltage C
R
Error Amplifier Voltage V
COMP
Window Voltage V
W
PWM
FIGURE 1. MODULATOR WAVEFORMS DURING LOAD TRANSIENT
TABLE 1. PGOOD PULL-DOWN RESISTANCE
CONDITION PGOOD RESISTANCE
V
CC
Below POR Undefined
Soft-start or Undervoltage 95Ω
Overvoltage 60Ω
Overcurrent 30Ω
EN
VCC and PVCC
VOUT
PGOOD
1.5ms
2.75ms
FIGURE 2. SOFT-START SEQUENCE
