Semiconductor Components Industries, LLC, 2005
January, 2005 − Rev. 5
1 Publication Order Number:
MC74LCX138/D
MC74LCX138
Low−Voltage CMOS 3−to−8
Decoder/Demultiplexer
With 5 V−Tolerant Inputs
The MC74LCX138 is a high performance, 3−to−8
decoder/demultiplexer operating from a 2.3 to 3.6 V supply. High
impedance TTL compatible inputs significantly reduce current
loading to input drivers while TTL compatible outputs offer improved
switching noise performance. A V
I
specification of 5.5 V allows
MC74LCX138 inputs to be safely driven from 5 V devices. The
MC74LCX138 is suitable for memory address decoding and other
TTL level bus−oriented applications.
The MC74LCX138 high−speed 3−to−8 decoder/demultiplexer
accepts three binary weighted inputs (A0, A1, A2) and, when enabled,
provides eight mutually exclusive active−LOW outputs (O0
−O7). The
LCX138 features three Enable inputs, two active−LOW (E1, E2) and
one active−HIGH (E3). All outputs will be HIGH unless E1 and E2 are
LOW, and E3 is HIGH. This multiple enabled function allows easy
parallel expansion of the device to a 1−of−32 (5 lines to 32 lines)
decoder with just four LCX138 devices and one inverter (see
Figure 1). The LCX138 can be used as an 8−output demultiplexer by
using one of the active−LOW Enable inputs as the data input and the
other Enable inputs as strobes. The Enable inputs which are not used
must be permanently tied to their appropriate active−HIGH or
active−LOW state.
Current drive capability is 24 mA at the outputs.
Features
• Designed for 2.3 V to 3.6 V V
CC
Operation
• 5 V Tolerant Inputs − Interface Capability With 5 V TTL Logic
• LVTTL Compatible
• LVCMOS Compatible
• 24 mA Balanced Output Sink and Source Capability
• Near Zero Static Supply Current (10 A) Substantially Reduces
System Power Requirements
• Latchup Performance Exceeds 500 mA
• ESD Performance: Human Body Model >2000 V
Machine Model >200 V
• Pb−Free Packages are Available*
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
MARKING
DIAGRAMS
A = Assembly Location
L, WL = Wafer Lot
Y = Year
W, WW = Work Week
SOIC−16
D SUFFIX
CASE 751B
LCX138
AWLYWW
LCX
138
ALYW
TSSOP−16
DT SUFFIX
CASE 948F
SOEIAJ−16
M SUFFIX
CASE 966
74LCX138
ALYW
16
1
16
16
1
1
16
1
16
1
16
1
See detailed ordering and shipping information in the package
dimensions section on page 3 of this data sheet.
ORDERING INFORMATION
http://onsemi.com
