DAC8412/DAC8413 Data Sheet
Rev. G | Page 16 of 20
WRDB0
WRDB1
WRDB2
WRDB3
WRDB4
WRDB5
WRDB6
WRDB7
WRDB8
WRDB9
WRDB10
RDDACB
RDDACA
WRDACA
WRDACB
RDDACC
WRDACC
RDDACD
WRDACD
READBACKDATAIN_DB10
READOUT
READOUTBAR
READBACKDATAIN_DB11
A1
A0
DGND
R/W
DB11..DB0
V
LOGIC
CS
DAC A
DAC B
DAC C
DAC D
WRDB11
INPUT
REGISTER
OUTPUT
REGISTER
V
REFL
V
OUTD
V
OUTC
V
OUTA
V
OUTB
RESE
T
LDAC
V
REFH
V
DD
V
SS
READBACK
DATAOUT_DB11
00274-039
Figure 38. Simplified I/O Logic Diagram
Careful attention to grounding is important for accurate
operation of the DAC8412. This is not because the DAC8412 is
more sensitive than other 12-bit DACs, but because with four
outputs and two references, there is greater potential for ground
loops. Because the DAC8412 has no analog ground, the ground
must be specified with respect to the reference.
REFERENCE CONFIGURATIONS
Output voltage ranges can be configured as either unipolar or
bipolar, and within these choices, a wide variety of options
exists. The unipolar configuration can be either positive or
negative voltage output, and the bipolar configuration can be
either symmetrical or nonsymmetrical.
REF10
+15
V
INPUT
OUTPUT
TRIM
10k
0.2µF
+10V OPERATION
+
+15V
OP400
–15V
V
REFL
V
REFH
DAC8412
OR
DAC8413
0.1µF
//10µF
V
DD
V
SS
00274-040
Figure 39. Unipolar +10 V Operation
+15V
1µF
0.2µF
39k
6.2
6.2
0.2µF
+15V
GAIN
100k
BALANCE
100k
AD688 FOR ±10V
AD588 FOR ±5V
V
DD
V
SS
V
REFL
V
REFH
DAC8412
OR
DAC8413
0.1µF
//10µF
–15V
±5 OR ±10V OPERATION
00274-041
Figure 40. Symmetrical Bipolar Operation
Figure 40 (symmetrical bipolar operation) shows the DAC8412
configured for ±10 V operation. See the AD688 data sheet for a
full explanation of reference operation. Adjustments may not be
required for many applications since the AD688 is a very high
accuracy reference. However, if additional adjustments are
required, adjust the DAC8412 full scale first. Begin by loading
the digital full-scale code (0xFFF), and then adjust the gain
adjust potentiometer to attain a DAC output voltage of 9.9976 V.
Then, adjust the balance adjust to set the center-scale output
voltage to 0.000 V.
Data Sheet DAC8412/DAC8413
Rev. G | Page 17 of 20
The 0.2 μF bypass capacitors shown at the reference inputs in
Figure 40 should be used whenever ±10 V references are used.
Applications with single references or references to ±5 V may
not require the 0.2 μF bypassing. The 6.2 Ω resistor in series
with the output of the reference amplifier keeps the amplifier
from oscillating with the capacitive load. This 6.2 Ω resistor has
been found to be large enough to stabilize this circuit. Larger
resistor values are acceptable, provided that the drop across the
resistor does not exceed V
BE
. Assuming a minimum V
BE
of 0.6 V
and a maximum current of 2.75 mA, then the resistor should be
under 200 Ω for the loading of a single DAC8412.
Using two separate references is not recommended. Having two
references can cause different drifts with time and temperature;
whereas with a single reference, most drifts track.
Unipolar positive full-scale operation can usually be set with a
reference with the correct output voltage. This is preferable to
using a reference and dividing down to the required value. For a
10 V full-scale output, the circuit can be configured as shown in
Figure 41. In this configuration, the full-scale value is set first by
adjusting the 10 kΩ resistor for a full-scale output of 9.9976 V.
10k
0.01µF
10µF
–15V
G
ND
TRIM
OUTPUT
VOLTAGE
REFERENCE
0.2µF
V
REFL
V
REFH
DAC8412
OR
DAC8413
0.1µF
//10µF
ZERO TO –10V OPERATION
V
DD
V
SS
00274-042
Figure 41. Unipolar –10 V Operation
Figure 41 shows the DAC8412 configured for –10 V to 0 V
operation. A –10 V full-scale output voltage reference is
connected directly to V
REFL
for the reference voltage.
SINGLE +5 V SUPPLY OPERATION
For operation with a 5 V supply, the reference voltage should be
set between 1.0 V and 2.5 V for optimum linearity. Figure 42
shows a REF43 used to supply a 2.5 V reference voltage. The
headroom of the reference and DAC are both sufficient to support
a 5 V supply with ±5% tolerance. V
DD
and V
LOGIC
should be
connected to the same supply. Separate bypassing to each pin
should also be used.
5
V
INPUT
OUTPUT
GND
TRIM
REF43
ZERO TO 2.5V OPERATION
SINGLE 5V SUPPLY
10k
0.2µF
V
REFL
V
REFH
DAC8412
OR
DAC8413
0.1µF
//10µF
10µF 0.01µF
V
DD
V
SS
00274-043
Figure 42. +5 V Single-Supply Operation
DAC8412/DAC8413 Data Sheet
Rev. G | Page 18 of 20
OUTLINE DIMENSIONS
1
28
5
11
18
BOTTON
VIEW
19 25
26
412
0.15 (3.81)
REF
0.075
(1.91)
REF
0.028 (0.71)
0.022 (0.56)
0.300 (7.62)
REF
0.055 (1.40)
0.045 (1.14)
0.075 (1.91)
REF
0.020 (0.51)
MIN
0.05 (1.27)
0.095 (2.41)
0.075 (1.90)
0.458 (11.63)
0.442 (11.23)
SQ
0.458
(11.63)
MAX
SQ
0.100 (2.54)
0.064 (1.63)
0.088 (2.24)
0.054 (1.37)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN
022106-A
Figure 43. 28-Terminal Ceramic Leadless Chip Carrier [LCC]
(E-28-1)
Dimensions shown in inches and (millimeters)
CONTROLLING DIMENSIONS ARE IN INCHES; MILLIMETER DIMENSIONS
(IN PARENTHESES) ARE ROUNDED-OFF INCH EQUIVALENTS FOR
REFERENCE ONLY AND ARE NOT APPROPRIATE FOR USE IN DESIGN.
CORNER LEADS MAY BE CONFIGURED AS WHOLE LEADS.
COMPLIANT TO JEDEC STANDARDS MS-011
071006-A
0.100 (2.54)
BSC
1.565 (39.75)
1.380 (35.05)
0.580 (14.73)
0.485 (12.31)
0.022 (0.56)
0.014 (0.36)
0.200 (5.08)
0.115 (2.92)
0.070 (1.78)
0.050 (1.27)
0.250 (6.35)
MAX
SEATING
PLANE
0.015
(0.38)
MIN
0.005 (0.13)
MIN
0.700 (17.78)
MAX
0.015 (0.38)
0.008 (0.20)
0.625 (15.88)
0.600 (15.24)
0.015 (0.38)
GAUGE
PLANE
0.195 (4.95)
0.125 (3.17)
28
114
15
Figure 44. 28-Lead Plastic Dual In-Line Package [PDIP]
Wide Body
(N-28-2)
Dimensions shown in inches and (millimeters)

DAC8412AT/883C

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC Quad 12-Bit Vout w/ Readback
Lifecycle:
New from this manufacturer.
Delivery:
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