Data Sheet DAC8412/DAC8413
Rev. G | Page 7 of 20
ABSOLUTE MAXIMUM RATINGS
T
A
= +25°C, unless otherwise noted.
Table 3.
Parameter Rating
V
SS
to V
DD
0.3 V, +33.0 V
V
SS
to V
LOGIC
0.3 V, +33.0 V
V
LOGIC
to DGND 0.3 V, +7.0 V
V
SS
to V
REFL
0.3 V, +V
SS
2.0 V
V
REFH
to V
DD
+2.0 V, +33.0 V
V
REFH
to V
REFL
+2.0 V, V
SS
V
DD
Current into Any V
SS
pin
±15 mA
Digital Input Voltage to DGND 0.3 V, V
LOGIC
+ 0.3 V
Digital Output Voltage to DGND 0.3 V, +7.0 V
Operating Temperature Range
EP, FP, FPC −40°C to +85°C
AT, BT, BTC 55°C to +125°C
Junction Temperature 150°C
Storage Temperature Range 65°C to +150°C
Power Dissipation Package 1000 mW
Lead Temperature JEDEC Industry Standard
Soldering J-STD-020
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
JA
is specified for the worst-case mounting conditions, that is, a
device in socket.
Table 4. Thermal Resistance
Package Type θ
JA
θ
JC
Unit
28-Lead Plastic DIP (PDIP) 48 22 °C/W
28-Terminal Ceramic Leadless Chip Carrier (LLC)
70
28
°C/W
28-Lead Plastic Leaded Chip Carrier (PLLC)
63
25
°C/W
28-Lead Ceramic Dual In-Line Package (CERDIP) 51 9 °C/W
ESD CAUTION
DAC8412/DAC8413 Data Sheet
Rev. G | Page 8 of 20
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
V
REFH
1
V
OUTB
2
V
OUTA
3
V
SS
4
V
REFL
28
V
OUTC
27
V
OUTD
26
V
DD
25
DGND
5
RESET
6
LDAC
7
V
LOGIC
24
CS
23
A0
22
DB0 (LSB)
8
A1
21
DB1
9
R/W
20
DB2
10
DB11 (MSB)
19
DB3
11
DB10
18
DB4
12
DB9
17
DB5
13
DB8
16
DB6
14
DB7
15
00274-008
DAC8412/
DAC8413
TOP VIEW
(Not to Scale)
1282726234
5
6
7
8
9
10
11
25
24
23
22
21
20
19
DGND
RESET
LDAC
DB0 (LSB)
DB1
DB2
DB3
V
DD
V
LOGIC
CS
A0
A1
R/W
DB11 (MSB)
V
SS
V
OUTA
V
OUTB
V
REFH
V
REFL
V
OUTC
V
OUTD
DB4
DB5
DB6
DB7
DB8
DB9
DB10
PIN 1
INDENTFIER
12 13 14 15 16 17 18
00274-009
DAC8412/
DAC8413
TOP VIEW
(Not to Scale)
00274-010
DAC8412/
DAC8413
TOP VIEW
(Not to Scale)
5
DGND
6
RESET
7
LDAC
8
DB0 (LSB)
9
DB1
10
DB2
11
DB3
25
V
DD
24
V
LOGIC
23
CS
22
A0
21
A1
20
R/W
19
DB11 (MSB)
26
V
OUTD
27
V
OUTC
28
V
REFL
1
V
REFH
2
V
OUTB
3
V
OUTA
4
V
SS
18
DB10
17
DB9
16
DB8
15
DB7
14
DB6
13
DB5
12
DB4
Figure 7. PDIP/CERDIP Figure 8. PLCC Figure 9. LCC
Table 5. Pin Function Descriptions
Pin Number Mnemonic Description
1 V
REFH
High-Side DAC Reference Input.
2 V
OUTB
DAC B Output.
3 V
OUTA
DAC A Output.
4 V
SS
Lower Rail Power Supply.
5 DGND Digital Ground.
6
RESET
Reset Input and Output Registers to all 0s, Enabled at Active Low.
7
LDAC
Load Data to DAC, Enabled at Active Low.
8 DB0 Data Bit 0, LSB.
9 DB1 Data Bit 1.
10 DB2 Data Bit 2.
11 DB3 Data Bit 3.
12 DB4 Data Bit 4.
13 DB5 Data Bit 5.
14 DB6 Data Bit 6.
15 DB7 Data Bit 7.
16 DB8 Data Bit 8.
17 DB9 Data Bit 9.
18 DB10 Data Bit 10.
19 DB11 Data Bit 11, MSB.
20
R/W
Active Low to Write Data to DAC. Active high to readback previous data at data bit pins with V
LOGIC
connected to 5 V.
21 A1 Address Bit 1.
22 A0 Address Bit 0.
23
CS
Chip Select, Enabled at Active Low.
24 V
LOGIC
Voltage Supply for Readback Function. Can be open circuit if not used.
25 V
DD
Upper Rail Power Supply.
26 V
OUTD
DAC D Output.
27 V
OUTC
DAC C Output.
28 V
REFL
Low-Side DAC Reference Input.
Data Sheet DAC8412/DAC8413
Rev. G | Page 9 of 20
TYPICAL PERFORMANCE CHARACTERISTICS
1
–1
6
0
11109
8
7
12
MAXIMUM LINEARITY ERROR (LSB)
V
REFH
(V)
V
DD
= +15V
V
SS
= –15V
V
REFL
= –10V
T
A
= 25°C
00274-011
Figure 10. DNL vs. V
REFH
1
–1
0
32
1
MAXIMUM LINEARITY ERROR (LSB)
V
REFH
(V)
V
DD
= 5V
V
SS
= 0V
V
REFL
= 0V
T
A
= 25°C
00274-014
Figure 11. INL vs. V
REFH
0.4
–0.6
1000
–0.4
0
0
–0.2
0.2
200
T = HOURS OF OPERATION AT 125°C
400
600 800
FULL-SCALE ERROR (LSB)
X+3σ
X
X–3σ
V
DD
= +15V
V
SS
= –15V
V
REFH
= +10V
V
REFL
= –10V
00274-015
Figure 12. Full-Scale Error vs. Time Accelerated by Burn-in
0
–2
–1
2
1
321
MAXIMUM LINEARITY ERROR (LSB)
V
REFH
(V)
V
DD
= 5V
V
SS
= 0V
V
REFL
= 0V
T
A
= 25°C
00274-012
Figure 13. DNL vs. V
REFH
0.3
0.1
0.2
1086 12
MAXIMUM LINEARITY ERROR (LSB)
V
REFH
(V)
V
DD
= +15V
V
SS
= –15V
V
REFL
= 0V
T
A
= 25°C
00274-013
Figure 14. INL vs.V
REFH
X+3σ
X
X–3σ
0.3
–0.7
1000
–0.5
0
–0.1
–0.3
0.1
200
T = HOURS OF OPERATION AT 125°C
400 600 800
ZERO-SCALE ERROR (LSB)
V
DD
= +15V
V
SS
= –15V
V
REFH
= +10V
V
REFL
= –10V
00274-016
Figure 15. Zero-Scale Error vs. Time Accelerated by Burn-In

DAC8412AT/883C

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC Quad 12-Bit Vout w/ Readback
Lifecycle:
New from this manufacturer.
Delivery:
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