across the fan until the desired speed is reached. Open-
loop operation allows the µC to regulate fan speed direct-
ly. The µC reads the fan speed from the Tach-
ometer-Count Register. Based on the tachometer
count, the µC decides if the fan speed requires adjust-
ment, and changes the voltage across the fan by writ-
ing an 8-bit word to the DAC Register. Full-on mode
applies the maximum voltage across the fan, forcing it
to spin at full speed. Configuring GPIO1 (see the
General-Purpose Input/Output
section) as an active-low
input provides additional hardware control that fully
turns on the fan and overrides all software commands.
General-Purpose Input/Output
The GPIO pins connect to the drain of the internal N-
channel MOSFET and pullup resistor (Figure 5). When
the N-channel MOSFET is off (Table 5), the pullup resis-
tor provides a logic-level high output. However, with the
MOSFET off, the GPIO may serve as an input pin and
its state is read from the GPIO Status Register (Table
6). The MAX6650/MAX6651 power up with the MOSFET
off, so input signals may be safely connected to the
GPIO pins. When using the GPIO pin as a general-pur-
pose output, change the output by writing to the GPIO
Definition Register.
GPIO0 may be configured as an ALERT output that will
go low whenever a fault-condition is detected (see the
Alarm-Enable and Status Registers
section). GPIO1
may be configured as a FULL ON input to allow hard-
ware control to fully turn on the fan in case of software
or µC failure. GPIO2 (MAX6651 only) may be config-
ured as an internal clock output or as an external clock
input to allow synchronization of multiple devices.
Alarm-Enable and Status Registers
The alarms are enabled only when the appropriate bits of
the Alarm-Enable Register are set (Table 7). The maxi-
mum and minimum output level alarms function only
when the device is configured to operate in the closed-
loop mode (see the
Configuration-Byte Register
section).
The Alarm Status Register allows the system to deter-
mine which alarm caused the alert output (Table 8).
The set-alarm and alert outputs clear after reading the
Fan-Speed Regulators and Monitors
with SMBus/I
2
C-Compatible Interface
10 Maxim Integrated
MAX6650/MAX6651
Table 4. Configuration Byte Register
Figure 5. General-Purpose Input/Output Structure
MAX6650
MAX6651
100kΩ
GPIO
STATUS
REGISTER
V
CC
3.0V TO 5.5V
V
CC
C
BYPASS
GPIO_
GND
GPIO
DEFINITION
REGISTER
BIT NAME
POR (DEFAULT)
STATE
FUNCTION
5 to 4
7 (MSB) to 6 0 Always 0
Operating Mode:
00 = Software full-on (default)
01 = Software off (shutdown)
10 = Closed-loop operation
11 = Open-loop operation
00MODE
3
5/12V
1
Fan/Tachometer Voltage:
0 = 5V
1 = 12V (default)
2 to 0 (LSB) SCALE 010
Prescaler Division:
000 = Divide by 1
001 = Divide by 2
010 = Divide by 4 (default)
011 = Divide by 8
100 = Divide by 16
Alarm Status Register if the condition that caused the
alarm is removed.
Tachometer
The Tachometer Count Registers record the number of
pulses on the corresponding tachometer input during the
period defined by the Tachometer Count-Time Register.
The MAX6651 contains three additional tachometer
inputs, which may be used to monitor additional fans. For
accurate control of multiple fans, use identical fans.
The Tachometer Count-Time Register sets the integration
time over which the MAX6650/MAX6651 count tachome-
ter pulses. The devices can count up to 255 (FFh) pulses
during the selected count time. If more than 255 pulses
occur, the IC sets the overflow alarm and the Tachometer
Count Register reports the maximum value of 255. Set
the time register so the count register will not overflow
under worst-case conditions (maximum fan speed) while
maximizing resolution. Calculate the maximum measur-
able fan speed and minimum resolution with the following
equations:
Max Fan Speed (in RPS) = 255 / (2 x t
COUNT
)
Min Resolution (in RPS) = 1 / (2 x t
COUNT
)
where t
COUNT
is the tachometer count time; 1kHz is the
maximum allowable tachometer input frequency for the
MAX6650/MAX6651.
Fan-Speed Regulators and Monitors
with SMBus/I
2
C-Compatible Interface
Maxim Integrated 11
MAX6650/MAX6651
Table 5. GPIO Definition Register
Table 6. GPIO Status Register
BIT
POR
(DEFAULT)
STATE
MAX6650
PIN
MAX6651
PIN
STATE FUNCTION
0 GPIO4 outputs a logic-low level.
7 1
N/A
(must be 1)
GPIO4
1 GPIO4 outputs a logic-high level or serves as an input.
0 GPIO3 outputs a logic-low level.
6 1
N/A
(must be 1)
GPIO3
1 GPIO3 outputs a logic-high level or serves as an input.
00 GPIO2 serves as an external clock input.
01 GPIO2 serves as an internal clock output.
10 GPIO2 outputs a logic-low level.
5:4 11
N/A
(must be 11)
GPIO2
11 GPIO2 outputs a logic-high level or serves as an input.
00 GPIO1 outputs a logic-high level or serves as an input.
01 GPIO1 serves as a FULL ON input.
10 GPIO1 outputs a logic-low level.
3:2 11 GPIO1 GPIO1
11 GPIO1 outputs a logic-high level or serves as an input.
00 GPIO0 outputs a logic-high level or serves as an input.
01 GPIO0 serves as an ALERT output.
10 GPIO0 outputs a logic-low level.
1:0 11 GPIO0 GPIO0
11 GPIO0 outputs a logic-high level or serves as an input.
BIT NAME
POR
(DEFAULT
STATE)
7 (MSB) to 5 Always 0 0
4 GPIO4 (MAX6651 only) 1
3 GPIO3 (MAX6651 only) 1
2 GPIO2 (MAX6651 only) 1
1GPIO11
0 (LSB) GPIO0 1
Fan-Speed Regulators and Monitors
with SMBus/I
2
C-Compatible Interface
12 Maxim Integrated
MAX6650/MAX6651
Table 8. Alarm Status Register Bit Assignments
7 (MSB) to 5
GPIO1
BIT
GPIO2 (MAX6651 only)
0
4
NAME
1 MIN
3
0
0 (LSB)
0
0
POR
(DEFAULT)
STATE
MAX 0
Always 0
Minimum Output Level Alarm
GPIO1 Alarm. Set when GPIO1 is low.
GPIO2 Alarm. Set when GPIO2 is low (MAX6651 only).
FUNCTION
Maximum Output Level Alarm
Tachometer Overflow Alarm2 TACH 0
The first 6 bits of the Tachometer Count-Time Register
are always zero, and the last 2 bits set the count time
(Table 9). The count time may be determined from the
following equation:
t
COUNT
= 0.25s x 2
K
COUNT
where K
COUNT
is the numerical value of the two 2LSBs.
The 0.25 factor has a ±10% uncertainty.
Upon power-up, the Tachometer Count Registers reset
to 00h and the Tachometer Count-Time Register sets a
1s integration time.
Digital-to-Analog Converter
When using the open-loop mode of operation, the DAC
Register sets the voltage on the low side of the fan. An
internal operational amplifier compares the feedback
voltage (V
FB
) with the reference voltage set by the 8-bit
DAC, and adjusts the output voltage (V
OUT
) until the
two input voltages are equal. The voltage at the FB pin
may be determined by the following equation:
V
FB
= (10 x V
REF
x K
DAC
) / 256
and the voltage across the fan is:
where K
DAC
is the numerical value of the DAC Register
and V
REF
= 1.5V. The minimum feedback voltage is
limited by the voltage drop across the external MOS-
FET (R
ON
x I
FAN
), and the maximum voltage is limited
by the fan’s supply voltage (V
FAN
). For linear opera-
V
k
k
K
V
FAN
DAC
REF
90
10
1
256
+
Table 9. Tachometer Count-Time Register
(Assumes two pulses per revolution)
1 = Alarm condition
REGISTER
VALUE
(K
COUNT
)
COUNT
TIME
(s)
MAXIMUM
FAN SPEED
(RPS)
MINIMUM
RESOLUTION
(Hz/COUNT)
0000 0000 0.25 512 2
12560.50000 0001
0000 0010 1.0 128 0.5
0.25642.00000 0011
Table 7. Alarm-Enable Register Bit Masks
7 (MSB) to 5
GPIO1
BIT
GPIO2 (MAX6651 only)
0
4
NAME
1 MIN
3
0
0 (LSB)
0
0
POR
(DEFAULT)
STATE
MAX 0
2 TACH 0
Always 0
Minimum Output Level Alarm Enable/Disable
GPIO1 Alarm Enable/Disable
GPIO2 Alarm Enable/Disable (MAX6651 only)
FUNCTION
Maximum Output Level Alarm Enable/Disable
Tachometer Overflow Alarm Enable/Disable
1 = Enabled

MAX6651EEE

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Motor / Motion / Ignition Controllers & Drivers
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