Fan-Speed Regulators and Monitors
with SMBus/I
2
C-Compatible Interface
Maxim Integrated 19
MAX6650/MAX6651
For parallel fan control while monitoring only a single
fan, select the MAX6650.
Synchronized Fan Control (MAX6651 Only)
In systems with multiple fans, an audible beat frequency
can sometimes be detected due to fan speed mismatch.
This happens in systems where fans are connected in
parallel or in systems with a MAX6650 controlling each
fan. In parallel fan systems, speed mismatches occur
because no two fans are identical. Slight mechanical
variations or loading differences can result in enough of
a speed mismatch to cause an audible beat.
Even in systems where there is a MAX6650/MAX6651
for each fan, there can still be speed mismatches. This
is primarily due to the oscillator tolerance. The
MAX6650/MAX6651 oscillator tolerance is specified to
be ±10%. In the worst case, this could result in a 20%
(one 10% high, one 10% low) speed mismatch.
The solution is to use a single MAX6651 for each fan,
and configure the parts to use a shared clock. The
shared clock can either be an external system clock or
one of the MAX6651’s internal clocks. If an external
clock is used, its frequency can range from approxi-
mately 50kHz to 500kHz.
For synchronized fan control, select the MAX6651.
Combination
In more complex systems, a combination of some or all
of the above control types may be needed.
Choosing a Fan
Once the topology is chosen, the next step is to choose
a fan. See the appropriate section.
Enter a zero in bit 3 of the configuration register for a
5V fan and 1 for a 12V fan.
Configuring this bit also adjusts the tachometer input
threshold voltage. This optimizes operation of the
MAX6650/MAX6651 for the operating voltage of the fan
being used.
Setting the Mode of Operation
The MAX6650/MAX6651 have four modes of operation
as determined by bits 5 and 6 of the configuration reg-
ister: full on, full off, open loop, and closed loop.
Full-On
The full-on mode applies the maximum available volt-
age across the fan, guaranteeing maximum cooling.
Full-on mode can be entered through software or hard-
MAX6651
V
CC
SCL
10kΩ
SDA
GPIO0
OUT
ADD
GND
FB
TACH0
V
CC
3V TO 5.5V
V
FAN
5V OR 12V
C
COMP
10μF
SMBus/I
2
C
INTERFACE
GPIO1
GPIO2
FULL ON
ALERT
FAN
2.2kΩ
V
ID
HOT-SWAP SECTION
Figure 13. Hot-Swap Application
Fan-Speed Regulators and Monitors
with SMBus/I
2
C-Compatible Interface
20 Maxim Integrated
MAX6650/MAX6651
ware control. To enter full-on mode through hardware,
see the
Setting Up the GPIOs
section. Note that a hard-
ware full-on overrides all other modes.
Configure the MAX6650/MAX6651 to run in software
full-on mode by entering 00 into bits 5 and 4 of the con-
figuration register.
Full-Off
The full-off mode removes all the voltage across the
fan, causing the fan to stop. Because the MAX6650/
MAX6651 work by controlling the voltage on the low
side of the fan, either 5V or 12V will be on both leads.
Enter full-off mode by entering 01 into bits 5 and 4 of
the configuration register.
Open Loop
In open-loop mode, the MAX6650/MAX6651 do not
actually regulate the fan speed. Speed regulation
requires an external µC. Although open-loop mode
allows maximum flexibility, it also requires the most
software/processor overhead.
In open-loop mode, the MAX6650/MAX6651 act as an
SMB/I
2
C-controlled voltage regulator. The µC adjusts
the voltage across the fan by writing an 8-bit value to
the DAC register. This gives the µC direct control of the
voltage across the fan. Speed regulation is accom-
plished by periodically reading the tachometer regis-
ter(s) and adjusting the DAC register appropriately. The
DAC value controls the voltage across the fan accord-
ing to the following equation:
V
FAN
= V
FAN_SUPPLY
- [((R2) / R1) + 1] x V
REF
x K
DAC
/
256
where V
FAN
= the voltage across the fan, V
FAN_SUPPLY
= the supply voltage for the fan (5V or 12V), R2 = 90kΩ
(typ), R1 = 10kΩ (typ), V
REF
= 1.5V (typ), and K
DAC
=
the value in the DAC register.
Note several important things in this equation. First, the
voltage across the fan moves in the opposite direction
of the DAC value. In other words, low DAC values cor-
respond to higher voltages across the fan and therefore
higher speeds. Second, DAC values greater than 180
will result in 0V across a 12V fan. Similarly, DAC values
greater than 76 will produce 0V across a 5V fan. This
limits the useful range of the DAC from 0 to 180 for 12V
fans and 0 to 76 for 5V fans.
Remember that device tolerances can cause the output
voltage value to vary significantly from unit to unit and
over temperature. However, because this voltage is
within a closed speed-control loop, such errors are cor-
rected by the loop.
Below is a possible strategy for controlling the fan
under open-loop mode:
1) On power-up, put the device in open-loop mode with
a DAC value of 00 (full speed).
2) Allow the fan speed to settle.
3) Read the TACH register to determine the speed.
4) Gradually increase the DAC register value (in steps
of 1 or 2) until the desired speed is obtained.
In open-loop mode, any one of the four tachometer regis-
ters (MAX6651) can be used to measure and regulate the
fan’s speed. This is especially useful in parallel fan sys-
tems where up to four fans will be controlled as one unit.
Care must be taken with this mode to prevent instabili-
ty, which can be caused by trying to update the fan
speed too often or in increments that are too large.
Instability can result in the fan speeding up and slowing
down repeatedly. Determining the proper update rate,
as shown in the following steps, depends largely on the
fan’s mechanical time constant and the system’s loop
gain (DAC step sizes):
1) Enter open-loop mode by setting bits 5 and 4 of the
control register to 11.
2) Determine the speed of the fan(s) by reading the
TACH register(s).
3) Increase or decrease the DAC register to decrease
or increase the voltage across the fan, thereby
adjusting its speed.
Closed Loop
In closed-loop mode, the SMBus/I
2
C master (usually a
µC) writes a desired fan speed to the MAX6650/
MAX6651, and the device automatically adjusts the
voltage across the fan to maintain this speed. This
operation mode requires less software/processor over-
head than the open-loop mode. Once the desired
speed has been written, the MAX6650/MAX6651 con-
trol the fan’s speed independently, with no intervention
required from the master. If desired, the MAX6650/
MAX6651 can be configured to generate an interrupt if
it is unable to regulate the fan’s speed at the desired
value (see
Setting Up Alarms
). The MAX6650/MAX6651
can regulate only the speed of the fan connected to the
TACH0 input. Fans connected in parallel to the TACH0
fan will tend to run at similar speeds (assuming similar
fans). When going from full-off to closed-loop-mode, it
is recommended following this sequence:
1) Full-off mode
2) Full-on mode (with sufficient pause to initiate
movement)
3) Closed-loop mode
Fan-Speed Regulators and Monitors
with SMBus/I
2
C-Compatible Interface
Maxim Integrated 21
MAX6650/MAX6651
The MAX6650 regulates fan speed in the following
manner. The output of an internal 254kHz oscillator is
divided by 128, generating a roughly 2kHz signal. This
signal is divided by 1 plus the value in the speed regis-
ter and is used as a reference frequency. For example,
02h in the speed register will result in a 667Hz [2kHz /
(02h+1)] reference frequency, which is then compared
against the frequency at the tachometer input divided
by the prescaler value. The MAX6650/MAX6651
attempt to keep the tachometer frequency divided by
the prescaler equal to the reference frequency by
adjusting the voltage across the fan. If the tachometer
frequency divided by the prescaler value is less than
the reference frequency, the voltage across the fan is
increased. Remember that the tachometer will give two
pulses per revolution of the fan. The following equations
describe the operation.
When in regulation:
[f
CLK
/ (128 x (K
TACH
+ 1))] = 2 x FanSpeed / K
SCALE
where f
CLK
= oscillator frequency (either the 254kHz
internal oscillator or the externally applied clock), K
TACH
= the value in the speed register, FanSpeed = the
speed of the fan in revolutions per second (Hz),
K
SCALE
= the prescaler value (1, 2, 4, 8, or 16).
Solving for all four variables:
K
TACH
= [(f
CLK
x K
SCALE
) / (256 x FanSpeed)] - 1
K
SCALE
= [256 x FanSpeed x (K
TACH
+ 1)] / f
CLK
FanSpeed = K
SCALE
x f
CLK
/ [256 x (K
TACH
+ 1)]
f
CLK
= 256 x FanSpeed x (K
TACH
+ 1) / K
SCALE
If the internal oscillator is used, setting f
CLK
to 254kHz
can further reduce the equations:
Equation 1: K
SCALE
= FanSpeed x (K
TACH
+ 1) / 992
Equation 2: K
TACH
= (992 x K
SCALE
/ FanSpeed) - 1
Equation 3: FanSpeed = 992 x K
SCALE
/ (K
TACH
+ 1)
Enter closed-loop mode by entering 10 into bits 5 and 4
of the configuration register.
Note that in equation 3, the fan speed is inversely pro-
portional to (K
TACH
+ 1). This means the regulated fan
speed is a nonlinear function of the value written to the
speed register. Low values written to the speed register
can result in large relative changes in fan speed. For
best results, design the system so that small values
(such as 02h) are not needed. This is easily accom-
plished because an 8-bit speed register is used, and
fan-speed control should rarely need more than 16
speeds. A good compromise is to design the system
(by selecting the appropriate prescaler value) so that
the maximum-rated speed of the fan occurs when the
speed register equals approximately 64 (decimal).
Although 64 is a good target value, values between 20
and 100 will work fine.
The prescaler value also affects the response time and
the stability of the speed-control loop. Adjusting the
prescaler value effectively adjusts the loop gain. A larg-
er prescaler value will slow the response time and
increase stability, while a smaller prescaler value will
yield quicker response time. The optimum prescaler
value for response time and stability depends on the
fan’s mechanical time constant. Small, fast-spinning
fans will tend to have small mechanical time constants
and can benefit from smaller prescaler values. A good
rule of thumb is to try the selected prescaler value in
the target system. Set K
TACH
to around 75% of full
scale, and watch for overshoot or oscillation in the fan
speed. Also look for overshoot or oscillation when
K
TACH
is changed from one value to another (e.g., from
75% of full-scale speed to 90% of full scale). If there is
unacceptable overshoot or if the fan speeds up and
slows down with K
TACH
, set it to a constant value;
increase the prescaler value.
Enter the appropriate prescaler value in bits zero to 2 of
the configuration register.
Fan speed is a trade-off between cooling requirements,
noise, power, and fan wear. In general, it is desirable
(within limits) to run the fan at the slowest speed that
will accomplish the cooling goals. This will reduce
power consumption, increase fan life, and minimize
noise. When calculating the desired fan speed, remem-
ber that the above equations are written in rotations per
second (RPS), where most fans are specified in rota-
tions per minute (RPM).
Write the desired fan speed to the speed register.
Example:
Assume the following:
12V fan is rated at 2000RPM at 12V.
Use the internal oscillator (f
CLK
= 254kHz).
Desired fan speed = 1500RPM (25RPS).
First, calculate an appropriate prescaler value
(K
SCALE
) using equation 1. Attempt to get K
TACH
as
close to 64 as possible for the maximum speed of
2000RPM.
Set FanSpeed = 33.3RPS (2000RPM/60).
Set K
TACH
= 64.
Solving equation 1 gives K
SCALE
= 2.18.

MAX6651EEE

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Manufacturer:
Maxim Integrated
Description:
Motor / Motion / Ignition Controllers & Drivers
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