LTC3900
10
3900fb
The value of the resistors, R
CS1
, R
CS2
and R
CS3
, should
be calculated using the following formulas to meet both
the threshold and clamp voltage requirements:
k = 48 • I
RIPPLE
• R
DS(ON)
–1
R
CS2
= {200 • V
IN(MAX)
• (N
S
/N
P
) –2200 • (1 + k)} /k
R
CS1
= k • R
CS2
R
CS3
= {R
CS1
• R
CS2
} / {R
CS1
+ R
CS2
}
If k = 0 or less than zero, R
CS2
is not needed and R
CS1
= R
CS3
= {V
IN(MAX)
• (N
S
/N
P
) – 11V} / 5mA
where:
I
RIPPLE
= Inductor peak-to-peak ripple current
R
DS(ON)
= On-resistance of Q4 at I
RIPPLE
/2
V
IN(MAX)
= Primary side main supply maximum input
voltage
N
S
/N
P
= Power transformer T1, turn ratio
If the LTC3900 still operates in discontinuous mode with
the calculated resistance value, increase the value of R
CS1
to raise the threshold. The resistors R
CS1
and R
CS2
and the
CS
+
pins input capacitance plus the PCB trace capacitance
form an R-C delay; this slows down the response time
of the comparator. The resistors and CS
+
input leakage
currents also create an input offset error.
To minimize this delay and error, do not use resistance
value higher than required and make the PCB trace from
the resistors to the LTC3900 CS
+
/CS
pins as short as
possible. Add a series resistor, R
CS3
with value equal to
parallel sum of R
CS1
and R
CS2
to the CS
pin and connect
the other end of R
CS3
directly to the source of Q4.
SYNC Input
Figure 7 shows the external circuit for the LTC3900 SYNC
input. With a selected type of pulse transformers, the
values of the C
SG
and R
SYNC
should be adjusted to obtain
an optimum SYNC pulse amplitude and width. A bigger
capacitor, C
SG
, generates a higher and wider SYNC pulse.
The peak of this pulse should be much higher than the typi-
cal LTC3900 SYNC threshold of ±1.4V. Amplitudes greater
than ±5V will help to speed up the SYNC comparator and
reduce the SYNC to drivers propagation delay. The pulse
width should be wider than 75ns. Overshoot during the
pulse transformer reset interval must be minimized and
kept below the minimum SYNC threshold of ±1V. The
amount of overshoot can be reduced by having a smaller
R
SYNC
.
SYNC
FG
CG
3900 F06b
INDUCTOR
CURRENT
0A
ADJUSTED CURRENT
SENSE THRESHOLD
Figure 6b. Continuous Current Mode Operation
with Adjusted Current Sense Threshold
Figure 7. SYNC Input Circuit
R
SYNC
470Ω
T2
T2: COILCRAFT Q4470B
OR PULSE P0926
C
SG
220pF
PRIMARY
CONTROLLER
SG
(S
OUT
)
LTC3900
SYNC
3900 F07
applicaTions inForMaTion
LTC3900
11
3900fb
applicaTions inForMaTion
An alternative method of generating the SYNC pulse is
shown in Figure 8. This circuit produces square SYNC
pulses with amplitude dependent on the logic supply
voltage. The SYNC pulse width can be adjusted with R1
and C1 without affecting the pulse amplitude.
For nonisolated applications, the SYNC input can be driven
directly by a bipolar square pulse. To reduce the propa-
gation delay, make the positive and negative magnitude
of the square wave much greater than the ±1.4V SYNC
threshold.
V
CC
Regulator
The V
CC
supply for the LTC3900 can be generated by peak
rectifying the transformer secondary winding as shown
in Figure 9. The Zener diode D
Z
sets the output voltage to
(V
Z
– 0.7V). A resistor, R
B
(on the order of a few hundred
ohms), in series with the base of Q
REG
may be required
to surpress high frequency oscillations depending on
Q
REG
s selection.
The LTC3900 has an UVLO detector that pulls the drivers
output low if V
CC
< 4.1V. The UVLO detector has 0.5V of
hysteresis to prevent chattering.
In a typical forward converter, the secondary-side circuits
have no power until the primary-side controller starts
operating. Since the power for biasing the LTC3900 is
derived from the power transformer T1, the LTC3900 will
initially remain off. During that period (V
CC
< 4.1V), the
output rectifier MOSFETs Q3 and Q4 will remain off and
the MOSFETs body diodes will conduct. The MOSFETs
may experience very high power dissipation due to a high
voltage drop in the body diodes. To prevent MOSFET dam-
age, V
CC
voltage greater than 4.1V should be provided
quickly. The V
CC
supply circuit shown in Figure 9 will pro-
vide power for the LTC3900 within the first few switching
pulses of the primary controller, preventing overheating
of the MOSFETs.
MOSFET Selection
The required MOSFET R
DS(ON)
should be determined based
on allowable power dissipation and maximum required
output current.
The body diodes conduct during the power-up phase, when
the LTC3900 V
CC
supply is ramping up. The CG and FG
signals stay low and the inductor current flows through
the body diodes. The body diodes must be able to handle
the load current during start-up until V
CC
reaches 4.1V.
The LTC3900 drivers dissipate power when switching
MOSFETs. The power dissipation increases with switch-
ing frequency, V
CC
and size of the MOSFETs. To calculate
Figure 9. V
CC
Regulator
Figure 8. Symmetrical SYNC Drive
R
SYNC
470Ω
T2
LTC3900
SYNC
3900 F08
74HC14
74HC14
74HC132
R1
470Ω
C1
220pF
SYNC
SG
PRIMARY
CONTROLLER
SG
3900 F09
D3
MBR0540
T1
SECONDARY
WINDING
0.1µF
R
Z
2k
R
B
10Ω
Q
REG
BCX55
C
VCC
4.7µF
V
CC
D
Z
7.5V
LTC3900
12
3900fb
applicaTions inForMaTion
the driver dissipation, the total gate charge Q
G
is used.
This parameter is found on the MOSFET manufacturers
data sheet.
The power dissipated in each LTC3900 MOSFET driver
is:
P
DRIVER
= Q
G
• V
CC
• f
SW
where f
SW
is the switching frequency of the converter.
PC Board Layout Checklist
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3900 for your layout:
1. Connect the 4.7µF bypass capacitor as close as possible
to the V
CC
and GND pins.
2. Connect the two MOSFET drain terminals directly to
the transformer. The two MOSFET sources should be as
close together as possible.
3. Keep the timer, SYNC and V
CC
regulator circuit away
from the high current path of Q3, Q4 and T1.
4. Place the timer capacitor, C
TMR
, as close as possible
to the LTC3900.
5. Keep the PCB trace from the resistors R
CS1
, R
CS2
and
R
CS3
to the LTC3900 CS
+
/CS
pins as short as possible.
Connect the other ends of the resistors directly to the drain
and source of the MOSFET, Q4.
LTC3900
8V
BIAS
V
B1
V
B1
220pF
BAT760
8V
BIAS
3
FG
5
CG
+V
IN
36V TO 72V
PA0912.002
BAS516
BCX55
V
OUT
3.3V, 40A
10k
10k
10k
1nF
1µF
15k
560R
C
OUT
100µF
3x
0.1µF
2.2µF
1nF
12V
Q2
PH3230
2x
Q3
PH3230
2x
18V
NEC
PS2701
Q4470-B
V
B1
C16
10pF
C13
1µF
C14
33nF
C15
6.8nF
82k
47k
3900 TA01
L1
SD_V
SEC
OUT
LT1952
7 14
R
OSC
V
IN
3 15
BLANK GND
9 8
SS_MAXDC PGND
5 13
DELAY
12
V
R
= 2.5V OC
6 11
COMP I
SENSE
1 10
FB = 1.23V SOUT
2 16
Si7846
1
GND
6
CS
+
2
V
CC
4
CS
7
SYNC
8
TIMER
370k
0.010R
1nF
470Ω
39k
13.2k
115k
27k
0.22µF
0.1µF
10k59k
33k
2.2k
22k
L1: PA0713, PULSE ENGINEERING
ALL CAPACITORS X7R, CERAMIC, TDK
R24
27.4k
1%
R25
6.04k
1%
R23
3.3k
6
5
4
1
2
3
LT4430
V
IN
GND
OC
OPTO
COMP
FB
8V BIAS
R22
270Ω
Typical applicaTions
36V to 72V, 3.3V at 40A Synchronous Forward Converter

LTC3900IS8#TRPBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Gate Drivers Sync Rectifier Drvr for For Convs
Lifecycle:
New from this manufacturer.
Delivery:
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