10
FN6442.1
September 29, 2008
The average current signal on I
OUT
remains accurate
provided that the output inductor current is continuous (CCM
operation). Once the inductor current becomes
discontinuous (DCM operation), I
OUT
represents 1/2 the
peak inductor current rather than the average current. This
occurs because the sample and hold circuitry is active only
during the on time of the switching cycle. It is unable to
detect when the inductor current reaches zero during the off
time.
If average overcurrent limit is desired, I
OUT
may be used
with either of the available error amplifiers of the ISL6755.
Typically I
OUT
is divided down and filtered as required to
achieve the desired amplitude. The resulting signal is input
to the current error amplifier (IEA). The IEA is similar to the
voltage EA found in most PWM controllers, except it cannot
source current. Instead, VERR has a separate internal 1mA
pull-up current source.
Configure the IEA as an integrating (Type I) amplifier using
the internal 0.6V reference. The voltage applied at FBx is
integrated against the 0.6V reference. The resulting signal,
VERR, is applied to the PWM comparator where it is
compared to the sawtooth voltage on RAMP. If FBx is less
than 0.6V, the IEA will be open loop (can’t source current),
VERR will be at a level determined by the voltage loop, and
the duty cycle is unaffected. As the output load increases,
IOUT will increase, and the voltage applied to FB will
increase until it reaches 0.6V. At this point the IEA will
reduce VERR as required to maintain the output current at
the level that corresponds to the 0.6V reference. When the
output current again drops below the average current limit
threshold, the IEA returns to an open loop condition, and the
duty cycle is again controlled by the voltage loop.
The average current control loop behaves much the same
as the voltage control loop found in typical power supplies
except it regulates current rather than voltage.
The EA available on the ISL6755 may also be used as the
voltage EA for the voltage feedback control loop rather than
the current EA as described above. An external op-amp may
be used as either the current or voltage EA providing the
circuit is not allowed to source current into VERR. The
external EA must only sink current, which may be
accomplished by adding a diode in series with its output.
The 4x gain of the sample and hold buffer allows a range of
150mV to 1000mV peak on the CS signal, depending on the
resistor divider placed on I
OUT
. The overall bandwidth of the
average current loop is determined by the integrating current
EA compensation and the divider on I
OUT
.
The current EA cross-over frequency, assuming R6 >>
(R4||R5), is:
where f
CO
is the cross-over frequency. A capacitor in parallel
with R4 may be used to provide a double-pole roll-off.
The average current loop bandwidth is normally set to be
much less than the switching frequency, typically less than
5kHz and often as slow as a few hundred hertz or less. This
is especially useful if the application experiences large
surges. The average current loop can be set to the steady
state overcurrent threshold and have a time response that is
longer than the required transient. The peak current limit can
be set higher than the expected transient so that it does not
interfere with the transient, but still protects for short-term
larger faults. In essence a 2-stage overcurrent response is
possible.
FIGURE 6. DYNAMIC BEHAVIOR OF CS vs IOUT
CHANNEL 1 (YELLOW): OUTLL
CHANNEL 3 (BLUE): CS
CHANNEL 2 (RED): OUTLR
CHANNEL 4 (GREEN): IOUT
FIGURE 7. AVERAGE OVERCURRENT IMPLEMENTATION
SS
OUTUR
OUTUL
OUTLR
OUTLL
VDD
VREF
GND
1
2
4
3
5
6
7
8
19
20
11
12
13
14
15
16
N/C
GND9
10
17
18
150 - 1000 mV
+
-
0.6V
S&H
4x
R6
R5
R4
C10
CS
FB1
IOUT
VERR
ISL6755
f
CO
1
2 R6 C10
-----------------------------------
= Hz
(EQ. 7)
ISL6755
11
FN6442.1
September 29, 2008
The peak overcurrent behavior is similar to most other PWM
controllers. If the peak current exceeds 1.0V, the active
output pulse is terminated immediately.
If voltage-mode control is used in a bridge topology, it should
be noted that peak current limit results in inherently unstable
operation. DC blocking capacitors used in voltage-mode
bridge topologies become unbalanced, as does the flux in
the transformer core. The average overcurrent circuitry
prevents this behavior by maintaining symmetric duty cycles
for each half-cycle. If the average current limit circuitry is not
used, a latching overcurrent shutdown method using
external components is recommended.
The CS to output propagation delay is increased by the
leading edge blanking (LEB) interval. The effective delay is
the sum of the two delays and is 130ns maximum.
Voltage Feed Forward Operation
Voltage feed forward is a technique used to regulate the
output voltage for changes in input voltage without the
intervention of the control loop. Voltage feed forward is often
implemented in voltage-mode control loops, but is redundant
and unnecessary in peak current-mode control loops.
Voltage feed forward operates by modulating the sawtooth
ramp in direct proportion to the input voltage. Figure 8
demonstrates the concept.
Input voltage feed forward may be implemented using the
RAMP input. An RC network connected between the input
voltage and ground, as shown in Figure 9, generates a
voltage ramp whose charging rate varies with the amplitude
of the source voltage. At the termination of the active output
pulse, RAMP is discharged to ground so that a repetitive
sawtooth waveform is created. The RAMP waveform is
compared to the VERR voltage to determine duty cycle. The
selection of the RC components depends upon the desired
input voltage operating range and the frequency of the
oscillator. In typical applications, the RC components are
selected so that the ramp amplitude reaches 1.0V at
minimum input voltage within the duration of one half-cycle.
The charging time of the ramp capacitor is:
For optimum performance, the maximum value of the
capacitor should be limited to 10nF. The maximum DC
current through the resistor should be limited to 2mA
maximum. For example, if the oscillator frequency is
400kHz, the minimum input voltage is 300V, and a 4.7nF
ramp capacitor is selected, the value of the resistor can be
determined by rearranging Equation 9.
where t is equal to the oscillator period minus the deadtime.
If the deadtime is short relative to the oscillator period, it can
be ignored for this calculation.
If feed forward operation is not desired, the RC network may
be connected to VREF rather than the input voltage.
Alternatively, a resistor divider from CTBUF may be used as
the sawtooth signal. Regardless, a sawtooth waveform must
be generated on RAMP as it is required for proper PWM
operation.
Slope Compensation
Peak current-mode control requires slope compensation to
improve noise immunity, particularly at lighter loads, and to
prevent current loop instability, particularly for duty cycles
greater than 50%. Slope compensation may be
accomplished by summing an external ramp with the current
feedback signal or by subtracting the external ramp from the
FIGURE 8. VOLTAGE FEED FORWARD BEHAVIOR
VIN
ERROR VOLTAGE
RAMP
CT
OUTLL, LR
FIGURE 9. VOLTAGE FEED FORWARD CONTROL
R3
C7
RAMP
GND
1
2
4
3
5
6
7
8
19
20
11
12
13
14
15
16
GND
ISL6755
9
10
17
18
VIN
tR3C71
V
RAMP PEAK
V
IN MIN
----------------------------------------



ln= S
(EQ. 8)
R3
t
C7 1
V
RAMP PEAK
V
IN MIN
----------------------------------------



ln
-------------------------------------------------------------------------
2.5 10
6
4.7 10
9
1
1
300
----------


ln
------------------------------------------------------------
==
159= k
(EQ. 9)
ISL6755
12
FN6442.1
September 29, 2008
voltage feedback error signal. Adding the external ramp to
the current feedback signal is the more popular method.
From the small signal current-mode model [1] it can be
shown that the naturally-sampled modulator gain, Fm,
without slope compensation, is
where Sn is the slope of the sawtooth signal and Tsw is the
duration of the half-cycle. When an external ramp is added,
the modulator gain becomes:
where Se is slope of the external ramp and:
The criteria for determining the correct amount of external
ramp can be determined by appropriately setting the
damping factor of the double-pole located at half the
oscillator frequency. The double-pole will be critically
damped if the Q-factor is set to 1, and over-damped for
Q > 1, and under-damped for Q < 1. An under-damped
condition can result in current loop instability.
where D is the percent of on time during a half cycle. Setting
Q = 1 and solving for Se yields:
Since S
n
and S
e
are the on time slopes of the current ramp
and the external ramp, respectively, they can be multiplied
by Ton to obtain the voltage change that occurs during Ton.
where Vn is the change in the current feedback signal during
the on time and Ve is the voltage that must be added by the
external ramp.
Vn can be solved for in terms of input voltage, current
transducer components, and output inductance yielding:
where R
CS
is the current sense burden resistor, N
CT
is the
current transformer turns ratio, L
O
is the output inductance,
V
O
is the output voltage, and Ns and Np are the secondary
and primary turns, respectively.
The inductor current, when reflected through the isolation
transformer and the current sense transformer to obtain the
current feedback signal at the sense resistor yields:
where V
CS
is the voltage across the current sense resistor
and I
O
is the output current at current limit.
Since the peak current limit threshold is 1.00V, the total
current feedback signal plus the external ramp voltage must
sum to this value.
Substituting Equations 16 and 17 into Equation 18 and
solving for R
CS
yields:
For simplicity, idealized components have been used for this
discussion, but the effect of magnetizing inductance must be
considered when determining the amount of external ramp
to add. Magnetizing inductance provides a degree of slope
compensation to the current feedback signal and reduces
the amount of external ramp required. The magnetizing
inductance adds primary current in excess of what is
reflected from the inductor current in the secondary.
where V
IN
is the input voltage that corresponds to the duty
cycle D and Lm is the primary magnetizing inductance. The
effect of the magnetizing current at the current sense
resistor, R
CS
, is:
If V
CS
is greater than or equal to Ve, then no additional
slope compensation is needed and R
CS
becomes:
If V
CS
is less than Ve, then Equation 19 is still valid for the
value of R
CS
, but the amount of slope compensation added
by the external ramp must be reduced by V
CS
.
Adding slope compensation is accomplished in the ISL6755
using the CTBUF signal. CTBUF is an amplified
representation of the sawtooth signal that appears on the CT
pin. It is offset from ground by 0.4V and is 2x the peak-to-
peak amplitude of CT (0.4V to 4.4V). A typical application
Fm
1
SnTsw
--------------------
=
(EQ. 10)
Fm
1
Sn Se+Tsw
---------------------------------------
1
m
c
SnTsw
----------------------------
==
(EQ. 11)
m
c
1
Se
Sn
-------
+=
(EQ. 12)
Q
1
m
c
1D0.5
-------------------------------------------------
=
(EQ. 13)
S
e
S
n
1
---
0.5+


1
1D
-------------
1


=
(EQ. 14)
V
e
V
n
1
---
0.5+


1
1D
-------------
1


=
(EQ. 15)
V
e
T
SW
V
O
R
CS
N
CT
L
O
------------------------------------------
N
S
N
P
--------
1
---
D0.5+


= V
(EQ. 16)
V
CS
N
S
R
CS
N
P
N
CT
------------------------
I
O
DT
SW
2L
O
---------------------
V
IN
N
S
N
P
--------
V
O



+



= V
(EQ. 17)
V
e
V
CS
+ 1=
(EQ. 18)
R
CS
N
P
N
CT
N
S
------------------------
1
I
O
V
O
L
O
--------
T
SW
1
---
D
2
----
+


+
------------------------------------------------------
=
(EQ. 19)
I
P
V
IN
DT
SW
L
m
-------------------------------
= A
(EQ. 20)
V
CS
I
P
R
CS
N
CT
--------------------------
= V
(EQ. 21)
R
CS
N
CT
N
S
N
P
--------
I
O
DT
SW
2L
O
-----------------
V
IN
N
S
N
P
--------
V
O



+



V
IN
DT
SW
L
m
-------------------------------
+
--------------------------------------------------------------------------------------------------------------------------------------
=
(EQ. 22)
ISL6755

ISL6755AAZA

Mfr. #:
Manufacturer:
Renesas / Intersil
Description:
Switching Controllers ZVS FL BRDG PWM CNTR 20LD QSOP W/ANNEAL
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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