9
LTC2424/LTC2428
TYPICAL PERFOR A CE CHARACTERISTICS
UW
INL vs Output Rate INL vs Output Rate
Resolution vs Output Rate
OUTPUT RATE (Hz)
0
TUE RESOLUTION (BITS)
16
18
20
40
24248 G27
14
12
10
10
20
30
50 60 70 80 90
100
V
CC
= 5V
V
REF
= 5V
F
O
= EXTERNAL
T
A
= –45°C
T
A
= 25°C
T
A
= 90°C
OUTPUT RATE (Hz)
0
TUE RESOLUTION (BITS)
16
18
20
40
24248 G28
14
12
10
10
20
30
50 60 70 80 90
100
V
CC
= 3V
V
REF
= 2.5V
F
O
= EXTERNAL
T
A
= –45°C
T
A
= 25°C
T
A
= 90°C
OUTPUT RATE (Hz)
0 7.5
RESOLUTION (BITS)
20
22
75
24248 G29
18
16
25
50
100
24
T
A
= 25°C
T
A
= 90°C
T
A
= –45°C
V
CC
= 5V
V
REF
= 5V
f
O
= EXTERNAL
PIN FUNCTIONS
UU
U
GND (Pins 1, 6, 16, 18, 22, 27, 28): Ground. Should be
connected directly to a ground plane through a minimum
length trace or it should be the single-point-ground in a
single-point grounding system.
V
CC
(Pins 2, 8): Positive Supply Voltage. 2.7V ≤ V
CC
≤
5.5V. Bypass to GND with a 10µF tantalum capacitor in
parallel with 0.1µF ceramic capacitor as close to the part
as possible.
FS
SET
(Pin 3): Full-Scale Set Input. This pin defines the
full-scale input value. When V
IN
= FS
SET
, the ADC outputs
full scale (FFFFF
H
). The total reference voltage (V
REF
) is
FS
SET
– ZS
SET
.
ADCIN (Pin 4): Analog Input. The input voltage range is
–0.125 • V
REF
to 1.125 • V
REF
. For V
REF
> 2.5V the input
voltage range may be limited by the pin absolute maxi-
mum rating of –0.3V to V
CC
+ 0.3V.
ZS
SET
(Pin 5): Zero-Scale Set Input. This pin defines the
zero-scale input value. When V
IN
= ZS
SET
, the ADC outputs
zero scale (00000
H
). For pin compatibility with the LTC2404/
LTC2408 this pin must be grounded.
MUXOUT (Pin 7): MUX Output. This pin is the output of the
multiplexer. Tie to ADCIN for normal operation.
CH0 (Pin 9): Analog Multiplexer Input.
CH1 (Pin 10): Analog Multiplexer Input.
CH2 (Pin 11): Analog Multiplexer Input.
CH3 (Pin 12): Analog Multiplexer Input.
CH4 (Pin 13): Analog Multiplexer Input. No connect on the
LTC2424.
CH5 (Pin 14): Analog Multiplexer Input. No connect on the
LTC2424.
CH6 (Pin 15): Analog Multiplexer Input. No connect on the
LTC2424.
CH7 (Pin 17): Analog Multiplexer Input. No connect on the
LTC2424.
CLK (Pin 19): Shift Clock for Data In. This clock synchro-
nizes the serial data transfer into the MUX. For normal
operation, drive this pin in parallel with SCK.
CSMUX (Pin 20): MUX Chip Select Input. A logic high on
this input allows the MUX to receive a channel address. A
logic low enables the selected MUX channel and connects
it to the MUXOUT pin for A/D conversion. For normal
operation, drive this pin in parallel with CSADC.
D
IN
(Pin 21): Digital Data Input. The multiplexer address
is shifted into this input on the last four rising CLK edges
before CSMUX goes low.
