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P3PS850BHG-08CR

P1-P3P4-P6P7-P9P10-P12
© Semiconductor Components Industries, LLC, 2012
January, 2012 − Rev. 1
1 Publication Order Number:
P3PS850BH/D
P3PS850BH
Timing-Safe] Peak EMI
Reduction IC
Functional Description
P3PS850BH is a versatile, Timing−Safe peak EMI reduction IC.
P3PS850BH accepts one input from an external reference, and locks
on to it delivering a 1x Timing−Safe output clock. P3PS850BH has a
Frequency Selection (FS) control that facilitates selecting one of the
two operating frequency ranges. Refer to the frequency Selection
table. The device has an SSEXTR pin to select different deviations
depending upon the value of an external resistor connected at this pin
to GND. P3PS850BH has an MR pin for selecting one of the two
Modulation Rates. PD#/OE provides the Power Down option. Outputs
will be tri−stated when power down is active.
P3PS850BH operates over a supply voltage range of 2.3 V to 3.6 V,
and is available in an 8 Pin WDFN (2 mm x 2 mm) Package.
General Features
• 1x , LVCMOS Timing−Safe Peak EMI Reduction
• Input Clock Frequency:
♦ 18 MHz − 72 MHz
• Output Clock Frequency( Timing−Safe):
♦ 18 MHz − 72 MHz
• Analog Frequency Deviation Selection
• Two different Modulation Rate Selection
• Power Down Option for Power Save
• Output Buffer Strength: 16 mA
• Supply Voltage: 2.3 V − 3.6 V
• 8 pin WDFN 2 mm x 2 mm, (TDFN) Package
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Application
• P3PS850BH is targeted for use in consumer electronic applications
like mobile phones, Camera modules, MFP and DPF.
WDFN8
CASE 511AQ
MARKING
DIAGRAMS
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PIN CONFIGURATION
See detailed ordering and shipping information in the package
dimensions section on page 11 of this data sheet.
ORDERING INFORMATION
P3PS850BH
1
DGMG
G
1
DG = Specific Device Code
M = Date Code
G = Pb−Free Device
1
2
3
4
8
7
6
5
CLKIN
PD#/OE
FS
GND
V
SSEXTR
MR
ModOUT
DD
P3PS850BH
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2
V
DD
GND
SSEXTR
CLKIN
ModOUT
(Timing−Safe)
PLL
FS
PD#/OE
MR
Figure 1. Block Diagram
Table 1. PIN DESCRIPTION
Pin# Pin Name Type Description
1 CLKIN I External reference Clock input.
2 PD# / OE I Power Down. Pull LOW to enable Power Down. Outputs will be tri−stated when power down is en-
abled. Pull HIGH to disable power down and enable output. NO default state.
3 FS I Frequency Select .NO default state. Refer to the Frequency Selection table
4 GND P Ground
5 ModOUT O Buffered modulated Timing−Safe clock output
6 MR I Modulation Rate Select. When LOW, selects Low Modulation Rate. Selects High
Modulation Rate when pulled HIGH. Has an internal pull−up resistor.
7 SSEXTR I Analog Deviation Selection through external resistor to GND.
8 V
DD
P Supply Voltage
Table 2. FREQUENCY SELECTION TABLE
FS Frequency (MHz)
0 18−36
1 36−72
Table 3. OPERATING CONDITIONS
Symbol Parameter Min Max Unit
V
DD
Supply Voltage 2.3 3.6 V
T
A
Operating Temperature −20 +85 °C
C
L
Load Capacitance 15 pF
C
IN
Input Capacitance 7 pF
P3PS850BH
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3
Table 4. ABSOLUTE MAXIMUM RATING
Symbol Parameter Rating Unit
V
DD,
V
IN
Voltage on any input pin with respect to Ground −0.5 to +4.6 V
T
STG
Storage temperature −65 to +125 °C
T
s
Max. Soldering Temperature (10 sec) 260 °C
T
J
Junction Temperature 150 °C
T
DV
Static Discharge Voltage (As per JEDEC STD22−A114−B) 2 kV
Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the
Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may
affect device reliability.
Table 5. DC ELECTRICAL CHARACTERISTICS
Symbol Parameter Test Conditions Min Typ Max Unit
V
DD
Supply Voltage 2.3 2.7 3.6 V
V
IH
Input HIGH Voltage 0.65 * V
DD
V
V
IL
Input LOW Voltage 0.35 * V
DD
V
I
IH
Input HIGH Current V
IN
= V
DD
10
mA
I
IL
Input LOW Current V
IN
= 0 V for MR pin 10
mA
V
OH
Output HIGH Voltage I
OH
= −16 mA 0.75 * V
DD
V
V
OL
Output LOW Voltage I
OL
= 16 mA 0.25 * V
DD
V
I
CC
Static Supply Current PD#/OE pin pulled to GND 10
mA
I
DD
Dynamic Supply Current Unloaded Output
FS = 0, @ 18 MHz 6 10
mA
FS = 0, @ 24 MHz 7 12
FS = 0, @ 36 MHz 10 17
FS = 1, @ 36 MHz 9 14
FS = 1, @ 48 MHz 11 19
FS = 1, @ 72 MHz 16 28
Z
o
Output Impedance 13
W
Table 6. AC ELECTRICAL CHARACTERISTICS
Parameter Test Conditions Min Typ Max Unit
Input Frequency
FS = 0 18 24 36
MHz
FS = 1 36 48 72
ModOUT
FS = 0 18 24 36
FS = 1 36 48 72
Duty Cycle (Note 1 and 2) Measured at V
DD
/ 2 45 50 55 %
Rise Time (Note 1 and 2) Measured between 20% to 80% 0.8 1.2 ns
Fall Time (Note 1 and 2
)
Measured between 80% to 20% 0.8 1.2 ns
1. All parameters are specified with 15 pF loaded output.
2. Parameter is guaranteed by design and characterization. Not 100% tested in production.
P1-P3P4-P6P7-P9P10-P12

P3PS850BHG-08CR

Mfr. #:
Buy P3PS850BHG-08CR
Manufacturer:
ON Semiconductor
Description:
Phase Locked Loops - PLL 18-72MHZ 2.5V/3.3V TS EMI
Lifecycle:
New from this manufacturer.
Delivery:
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