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SSESD11B5.0ST5G

P1-P3P4-P6
© Semiconductor Components Industries, LLC, 2015
September, 2015 − Rev. 1
1 Publication Order Number:
SSESD11B/D
SSESD11B
Transient Voltage
Suppressors
Micro−Packaged Diodes for ESD Protection
The ESD11B Series is designed to protect voltage sensitive
components from ESD. Excellent clamping capability, low leakage,
and fast response time provide best in class protection on designs that
are exposed to ESD. Because of its small size, it is suited for use in
cellular phones, MP3 players, digital cameras and many other portable
applications where board space comes at a premium.
Specification Features
• Low Capacitance 12 pF
• Low Clamping Voltage
• Small Body Outline Dimensions: 0.60 mm x 0.30 mm
• Low Body Height: 0.3 mm
• Stand−off Voltage: 5.0 V
• Low Leakage
• Response Time is < 1 ns
• IEC61000−4−2 Level 4 ESD Protection
• IEC61000−4−4 Level 4 EFT Protection
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Mechanical Characteristics
MOUNTING POSITION:
Any
QUALIFIED MAX REFLOW TEMPERATURE: 260°C
Device Meets MSL 3 Requirements
MAXIMUM RATINGS
Rating Symbol Value Unit
IEC 61000−4−2 (ESD) Contact
Air
±15
±15
kV
Total Power Dissipation on FR−5 Board
(Note 1) @ T
A
= 25°C
Thermal Resistance, Junction−to−Ambient
°P
D
°
R
q
JA
250
400
mW
°C/W
Junction and Storage Temperature Range T
J
, T
stg
−40 to +125 °C
Lead Solder Temperature − Maximum
(10 Second Duration)
T
L
260 °C
Peak Pulse Current, 8 x 20 ms double
exponential waveform (Figure 5)
I
pp
2.0 A
Stresses exceeding those listed in the Maximum Ratings table may damage the
device. If any of these limits are exceeded, device functionality should not be
assumed, damage may occur and reliability may be affected.
1. FR−5 = 1.0 x 0.75 x 0.62 in.
See Application Note AND8308/D for further description of survivability specs.
Device Package Shipping
†
ORDERING INFORMATION
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
s
Brochure, BRD8011/D.
www.onsemi.com
SSESD11B5.0ST5G DSN2
(Pb−Free)
5000 / Tape &
Reel
DSN2
CASE 152AS
MARKING
DIAGRAM
A = Specific Device Code
A
Bi−Directional TVS
I
PP
I
PP
V
I
I
R
I
T
I
T
I
R
V
RWM
V
C
V
BR
V
RWM
V
C
V
BR
SSESD11B
www.onsemi.com
2
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C unless otherwise noted)
Symbol
Parameter
I
PP
Maximum Reverse Peak Pulse Current
V
C
Clamping Voltage @ I
PP
V
RWM
Working Peak Reverse Voltage
I
R
Maximum Reverse Leakage Current @ V
RWM
V
BR
Breakdown Voltage @ I
T
I
T
Test Current
*See Application Note AND8308/D for detailed explanations of
datasheet parameters.
ELECTRICAL CHARACTERISTICS (T
A
= 25°C unless otherwise noted)
Device
Device
Marking
V
RWM
(V)
I
R
(mA)
@ V
RWM
V
BR
(V) @ I
T
(Note 2)
I
T
C (pF)
V
C
(V) @
1 A
V
C
Max Max Min mA Typ Max
Max
(Note 3)
Per IEC61000−4−2
(Note 4)
SSESD11B5.0ST5G 11B5 5.0 1.0 5.8 1.0 12 13.5 10 Figures 1 and 2
See Below
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
2. V
BR
is measured with a pulse test current I
T
at an ambient temperature of 25°C.
3. Surge current waveforms per Figure 5.
4. For test procedure see Figures 3 and 4 and Application Note AND8307/D.
Figure 1. ESD Clamping Voltage Screenshot
Positive 8 kV Contact per IEC61000−4−2
Figure 2. ESD Clamping Voltage Screenshot
Negative 8 kV Contact per IEC61000−4−2
SSESD11B
www.onsemi.com
3
IEC 61000−4−2 Spec.
Level
Test Volt-
age (kV)
First Peak
Current
(A)
Current at
30 ns (A)
Current at
60 ns (A)
1 2 7.5 4 2
2 4 15 8 4
3 6 22.5 12 6
4 8 30 16 8
I
peak
90%
10%
IEC61000−4−2 Waveform
100%
I @ 30 ns
I @ 60 ns
t
P
= 0.7 ns to 1 ns
Figure 3. IEC61000−4−2 Spec
50 W
50 W
Cable
TVS
Oscilloscope
ESD Gun
Figure 4. Diagram of ESD Test Setup
The following is taken from Application Note
AND8308/D − Interpretation of Datasheet Parameters
for ESD Devices.
ESD Voltage Clamping
For sensitive circuit elements it is important to limit the
voltage that an IC will be exposed to during an ESD event
to as low a voltage as possible. The ESD clamping voltage
is the voltage drop across the ESD protection diode during
an ESD event per the IEC61000−4−2 waveform. Since the
IEC61000−4−2 was written as a pass/fail spec for larger
systems such as cell phones or laptop computers it is not
clearly defined in the spec how to specify a clamping voltage
at the device level. ON Semiconductor has developed a way
to examine the entire voltage waveform across the ESD
protection diode over the time domain of an ESD pulse in the
form of an oscilloscope screenshot, which can be found on
the datasheets for all ESD protection diodes. For more
information on how ON Semiconductor creates these
screenshots and how to interpret them please refer to
AND8307/D.
Figure 5. 8 X 20 ms Pulse Waveform
100
90
80
70
60
50
40
30
20
10
0
020406080
t, TIME (ms)
% OF PEAK PULSE CURRENT
t
P
t
r
PULSE WIDTH (t
P
) IS DEFINED
AS THAT POINT WHERE THE
PEAK CURRENT DECAY = 8 ms
PEAK VALUE I
RSM
@ 8 ms
HALF VALUE I
RSM
/2 @ 20 ms
P1-P3P4-P6

SSESD11B5.0ST5G

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Buy SSESD11B5.0ST5G
Manufacturer:
ON Semiconductor
Description:
TVS Diodes - Transient Voltage Suppressors ESD11B WITH LAMINATE
Lifecycle:
New from this manufacturer.
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