Rev 1.8, March 16 , 2012 Page 1 of 12
400 West Cesar Chavez, Austin, TX 78701 1+(512) 416-8500 1+(512) 416-9669 www.silabs.com
SL18860DC
Key Features
Low current consumption
- 2.7mA-typ (VDD=1.8V and CL=0)
1.7V to 3.65V power supply operation
10MHz to 52MHz CLKIN
Supports LVCMOS and clipped sine wave inputs
Suports 3 single-ended LVCMOS square wave
outputs
OE1/2/3 functions for each CLKOUT1/2/3 outputs
OE_OSC control pin to enable external TCXO/XO
Ultra-Low phase noise
Ultra low standby current
10-pin TDFN package (1.4x2.0x0.75 mm)
Industrial -40 ºC to 85 ºC temperature range
Application
Smart Mobile Handsets
Multi-mode RF Clock Distribution
Baseband Peripheral Clock Distribution
Description
The SL18860DC product is a high performance 3 output
clock distribution buffer and provides 3 outputs from a
single input clock by using SLI proprietary low phase
noise and low power dissipation circuit design.
The SL18860DC can be used in baseband mobile RF
applications including WLAN, Bluetooth and DVB-H as an
input clock reference. The product designed to isolate
each device driven by their clock outputs to minimize
interference between these devices.
Each of the clock buffer outputs can be individually
disabled by using OE1/2/3 control pins to reduce the
power consumption if the connected device does not need
the clock. The device operates from single power supply
from 1.7V to 3.65V and from -40 ºC to 85 ºC.
Benefits
Fast Time-to-market
Cost Reduction
Low Power Dissipation
Low Phase Noise
Block Diagram
CONTROL LOGIC
6
7 5
10
4
8
9
3
2 1
CLKOUT1
CLKOUT2
CLKOUT3
CLKIN
VDD VSS
OE2 OE3OE1
OE_OSC
3-Channel Clock Distribution Buffer
Rev 1.8, March 16 , 2012 Page 2 of 12
SL18860DC
Pin Configuration
10
9
8
7
1
2
3
4
CLKOUT3
CLKOUT2
CLKOUT1
OE2
VSS
VDD
CLKIN
OE_OSC
OE3
5
6
OE1
10-Pin TDFN Package Pinout
Pin Description
Pin
Number
Pin Name Pin Type Pin Description
1 VSS Power Power supply ground.
2 VDD Power 2.25 to 3.65V or 1.8V +/-5% positive power supply
3 CLKIN Input External clock input pin. VSS to VDD CMOS level.
4 OE_OSC Output
Crystal oscillator enable pin. If OE1=OE2=OE3=0 then OE_OSC=0.
OE_OSC=1 for all the other OE1/2/3 logic states.
5 OE3 Input
Output enable pin for CLKOUT3. The input has 150k-typ on-chip pull-
down resistor.
6 OE1 Input
Output enable pin for CLKOUT1. The input has 150k-typ on-chip pull-
down resistor.
7 OE2 Input
Output enable pin for CLKOUT2. The input has 150k-typ on-chip pull-
down resistor.
8 CLKOUT1 Output Clock output-1. Clock frequency is the same as CLKIN.
9 CLKOUT2 Output Clock output-2. Clock frequency is the same as CLKIN.
10 CLKOUT3 Output Clock output-3. Clock frequency is the same as CLKIN.
Table 1. Truth Table for OE1/2/3, OE_OSC and CLKOUT1/2/3
OE1
(Input)
OE2
(Input)
OE_OSC
(Output)
CLKOUT1
CLKOUT2
CLKOUT3
0
0
0
Hi-Z
Hi-Z
Hi-Z
1
0
1
CLOCK
Hi-Z
Hi-Z
1
1
1
CLOCK
CLOCK
Hi-Z
1
1
1
CLOCK
CLOCK
CLOCK
Rev 1.8, March 16 , 2012 Page 3 of 12
SL18860DC
Absolute Maximum Ratings
Description Condition Min Max Unit
Supply voltage, VDD (Absolute)
-0.5 4.6 V
Supply voltage, VDD (Operation)
1.70 3.65 V
All Inputs and Outputs
-0.5 VDD+0.5 V
Ambient Operating Temperature
In operation, C-Grade -40 85 °C
Storage Temperature
No power is applied -65 150 °C
Junction Temperature
In operation, power is applied - 125 °C
Soldering Temperature
- 260 °C
ESD Rating (Human Body Model)
JEDEC22-A114D -4,000 4,000 V
ESD Rating (Charge Device Model)
JEDEC22-C101C -1,500 1,500 V
ESD Rating (Machine Model)
JEDEC22-A115D -200 200 V
DC Electrical Characteristics (I-Grade)
Unless otherwise stated VDD= 1.8V+/- 5% and Operation Temperature Range -40 to +85°C
Description Symbol Condition Min Typ Max Unit
Operating Voltage
VDD Operation range, 1.8V+/-5% 1.70 1.80 1.90 V
Operating Temperature
TA I-Grade -40 25 85 ºC
Input Low Voltage
VIL CMOS Level, Pins 3,5, 6 and 7 VSS - 0.3VDD V
Input High Voltage
VIH CMOS Level, Pins 3,5, 6 and 7 0.7VDD - VDD V
Output High Voltage
VOH IOH=-4mA , Pins 4, 8, 9 and 10 VDD-0.4 - - V
Output Low Voltage
VOL IOL=-4mA, Pins 4, 8, 9 and 10 - - 0.4 V
Input Leakage Current
ILH VIN=VDD, Pins 5, 6 and 7 -25 - 25 μA
Input Leakage Current
ILL VIN=GND, Pins 5, 6 and 7 -10 - 10 μA
Pull-Down Resistor
RPD Pins 5, 6 and 7 100 150 250
Operating Supply Current
IDD1
CLKIN=26MHz,
OE1=OE2=OE3=1
- 2.7 - mA
Operating Supply Current
IDD2
OE1=OE2=OE3=0
CLKIN=Low or High
- - 1.0 µA
Input Capacitance
CIN Pins 5, 6 and 7 - 3 5 pF
Load Capacitance
CL CLKOUT1/2/3, Pins 8, 9 and 10 - 10 20 pF

SL18860DCT

Mfr. #:
Manufacturer:
Silicon Labs
Description:
Clock Buffer Low phase jitter, TCXO distribution buffer
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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