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650R-12LFT

P1-P3P4-P6P7-P7
DATASHEET
MPEG CLOCK SYNTHESIZER ICS650-12
IDT™ / ICS™
MPEG CLOCK SYNTHESIZER 1
ICS650-12 REV E 051310
Description
The ICS650-12 is a low cost, low-jitter, high-performance
clock synthesizer designed to produce fixed clock outputs of
13.5 MHz and 27.0 MHz, and four selectable clock outputs:
two Processor Clocks (PCLK1) and PCLK2), an Audio
Clock, and a Communications Clock (CCLK). Using analog
Phase-Locked Loop (PLL) techniques, the device uses a
27.0 MHz clock or fundamental crystal to produce clocks
ideal for Digital Video/MPEG-based applications.
Features
• Packaged in 20-pin tiny SSOP (QSOP)
• RoHS 5 (green) or RoHS 6 (green and lead free)
compliant package
• Input frequency of 27.0 MHz
• Zero ppm synthesis error in output clocks
• Provides fixed 13.5 MHz and 27.0 MHz. Also provides
two selectable processor clocks, one audio clock, and
one communications clock.
• Ideal for digital video MPEG-based applications
• 3.3 V or 5.0 V operating voltage
• Entire chip powers down (when CS1=CS0=0)
Block Diagram
Input
Buffer/
Crystal
Oscillator
Clock
Synthesis
and Control
Circuitry
27.0 MHz crystal
or clock
PS2:0
CS1:0
AS2:0
PCLK1
PCLK2
ACLK
CCLK
13.5 MHz
27.0 MHz
/2
ICS650-12
MPEG CLOCK SYNTHESIZER CLOCK SYNTHESIZER
IDT™ / ICS™
MPEG CLOCK SYNTHESIZER 2
ICS650-12 REV E 051310
Pin Assignment
PCLK1 and PCLK2 Select Table (in MHz)
ACLK Select Table (in MHz)
CCLK Select Table (in MHz)
*Note: Entire chip powers-down (outputs stop low) when
CS1=CS0=0.
PS2 PS1 PS0 PCLK1 PCLK2
0 0 0 108.00 54.00
0 0 1 55.00 27.5
0 1 0 66.67 33.33
0 1 1 80.00 40.00
1 0 0 54.00 27.00
1 0 1 81.00 40.5
1 1 0 50.00 25.00
1 1 1 60.00 30.00
13
4
12
5
11
CS1
8
9
10
VDD
PCLK1
13.5M
AS0
CS0 27M
17
16
AS2
3X1
VDD PCLK2
18 CCLK
1PS2
X2 PS0
20 PS1
19
14
2
7
GND
ACLK
AS1
GND
156
20-pin SSOP (QSOP)
AS2 AS1 AS0 ACLK
0 0 0 12.288
0 0 1 11.2896
0 1 0 8.192
0 1 1 24.576
1 0 0 8.192
1 0 1 16.9344
1 1 0 18.432
1 1 1 11.2896
CS1 CS0 CCLK
00All off*
01 20.00
1 0 66.6666
1 1 24.576
ICS650-12
MPEG CLOCK SYNTHESIZER CLOCK SYNTHESIZER
IDT™ / ICS™
MPEG CLOCK SYNTHESIZER 3
ICS650-12 REV E 051310
Pin Descriptions
Key: Input = input with internal pull-up; XI and XO = crystal
connections; Power = power supply connection; Output =
output
Pin
Number
Pin
Name
Pin
Type
Pin Description
1 PS2 Input Processor Clock Select pin 2. See table on page 2.
2 X2 XO Crystal connection. Connect to a 27.0 MHz crystal or leave unconnected for a clock input.
3 X1 XI Crystal connection. Connect to a 27.0 MHz fundamental mode crystal or clock input.
4, 16 VDD Power Connect to +3.3 V or +5 V.
5 CS1 Input Communications Clock Select Pin 1. See table on page 2.
6, 14 GND Power Connect to ground.
7 ACLK Output Audio Clock Output. See table on page 2.
8 PCLK1 Output Processor Clock Output 1. See table on page 2.
9 CS0 Input Communications Clock Select 0. See table on page 2.
10 AS2 Input Audio Clock Select Pin 2. See table on page 2.
11 AS0 Input Audio Clock Select Pin 0. See table on page 2.
12 27M Output 27 MHz buffered clock output.
13 13.5M Output 13.5 MHz clock output.
15 AS1 Input Audio Clock Select Pin 1. See table on page 2.
17 PCLK2 Output Processor Clock Output 2. See table on page 2.
18 CCLK Output Communications Clock Output. See table on page 2.
19 PS0 Input Processor Clock Select Pin 0. See table on page 2.
20 PS1 Input Processor Clock Select Pin 1. See table on page 2.
P1-P3P4-P6P7-P7

650R-12LFT

Mfr. #:
Buy 650R-12LFT
Manufacturer:
IDT
Description:
Clock Synthesizer / Jitter Cleaner SYSTEM PERIPHERAL CLOCK SOURCE
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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