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AT49BV161-70TI

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7
AT49BV/LV160(T)/161(T)
1427L–FLASH–02/03
If the status bit configuration register is set to a “01”, the I/O7 status bit will be low while the
device is actively programming or erasing data. I/O7 will go high when the device has com-
pleted a program or erase operation. Once I/O7 has gone high, status information on the other
pins can be checked.
The Data
Polling status bit must be used in conjunction with the erase/program and V
PP
status
bit as shown in the algorithm in Figures 1 and 2 on page 10.
TOGGLE BIT: In addition to Data
Polling, the AT49BV/LV16X(T) provides another method for
determining the end of a program or erase cycle. During a program or erase operation, suc-
cessive attempts to read data from the memory will result in I/O6 toggling between one and
zero. Once the program cycle has completed, I/O6 will stop toggling and valid data will be
read. Examining the toggle bit may begin at any time during a program cycle. Please see “Sta-
tus Bit Table” on page 12 for more details.
The toggle bit status bit should be used in conjunction with the erase/program and V
PP
status
bit as shown in the algorithm in Figures 3 and 4 on page 11.
ERASE/PROGRAM STATUS BIT: The device offers a status bit on I/O5, which indicates
whether the program or erase operation has exceeded a specified internal pulse count limit. If
the status bit is a “1”, the device is unable to verify that an erase or a byte/word program oper-
ation has been successfully performed. The device may also output a “1” on I/O5 if the system
tries to program a “1” to a location that was previously programmed to a “0”. Only an erase
operation can change a “0” back to a “1”. If a program (Sector Erase) command is issued to a
protected sector, the protected sector will not be programmed (erased). The device will go to a
status read mode and the I/O5 status bit will be set high, indicating the program (erase) opera-
tion did not complete as requested. Once the erase/program status bit has been set to a “1”,
the system must write the Product ID Exit command to return to the read mode. The
erase/program status bit is a “0” while the erase or program operation is still in progress.
Please see “Status Bit Table” on page 12 for more details.
V
PP
STATUS BIT: The AT49BV/LV16X(T) provides a status bit on I/O3, which provides infor-
mation regarding the voltage level of the VPP pin. During a program or erase operation, if the
voltage on the VPP pin is not high enough to perform the desired operation successfully, the
I/O3 status bit will be a “1”. Once the V
PP
status bit has been set to a “1”, the system must
write the Product ID Exit command to return to the read mode. On the other hand, if the volt-
age level is high enough to perform a program or erase operation successfully, the V
PP
status
bit will output a “0”. Please see “Status Bit Table” on page 12 for more details.
SECTOR LOCKDOWN: Each sector has a programming lockdown feature. This feature pre-
vents programming of data in the designated sectors once the feature has been enabled.
These sectors can contain secure code that is used to bring up the system. Enabling the lock-
down feature will allow the boot code to stay in the device while data in the rest of the device is
updated. This feature does not have to be activated; any sector’s usage as a write-protected
region is optional to the user.
At power-up or reset, all sectors are unlocked. To activate the lockdown for a specific sector,
the six-bus cycle Sector Lockdown command must be issued. Once a sector has been locked
down, the contents of the sector is read-only and cannot be erased or programmed.
SECTOR LOCKDOWN DETECTION: A software method is available to determine if program-
ming of a sector is locked down. When the device is in the software product identification
mode (see “Software Product Identification Entry/Exit” sections on page 24), a read from
address location 00002H within a sector will show if programming the sector is locked down. If
the data on I/O0 is low, the sector can be programmed; if the data on I/O0 is high, the program
lockdown feature has been enabled and the sector cannot be programmed. The software
product identification exit code should be used to return to standard operation.
8
AT49BV/LV160(T)/161(T)
1427L–FLASH–02/03
SECTOR LOCKDOWN OVERRIDE: The only way to unlock a sector that is locked down is
through reset or power-up cycles. After power-up or reset, the content of a sector that is
locked down can be erased and reprogrammed.
ERASE SUSPEND/ERASE RESUME: The Erase Suspend command allows the system to
interrupt a sector erase or chip erase operation and then program or read data from a different
sector within the memory. After the Erase Suspend command is given, the device requires a
maximum time of 15 µs to suspend the erase operation. After the erase operation has been
suspended, the system can then read data or program data to any other sector within the
device. An address is not required during the Erase Suspend command. During a sector erase
suspend, another sector cannot be erased. To resume the sector erase operation, the system
must write the Erase Resume command. The Erase Resume command is a one-bus cycle
command. The device also supports an erase suspend during a complete chip erase. While
the chip erase is suspended, the user can read from any sector within the memory that is pro-
tected. The command sequence for a chip erase suspend and a sector erase suspend are the
same.
PROGRAM SUSPEND/PROGRAM RESUME: The Program Suspend command allows the
system to interrupt a programming operation and then read data from a different byte/word
within the memory. After the Program Suspend command is given, the device requires a max-
imum of 15 µs to suspend the programming operation. After the programming operation has
been suspended, the system can then read data from any other byte/word within the device.
An address is not required during the program suspend operation. To resume the program-
ming operation, the system must write the Program Resume command. The program suspend
and resume are one-bus cycle commands. The command sequence for the erase suspend
and program suspend are the same, and the command sequence for the erase resume and
program resume are the same.
PRODUCT IDENTIFICATION: The product identification mode identifies the device and man-
ufacturer as Atmel. It may be accessed by hardware or software operation. The hardware
operation mode can be used by an external programmer to identify the correct programming
algorithm for the Atmel product.
For details, see “Operating Modes” on page 17 (for hardware operation) or “Software Product
Identification Entry/Exit” on page 24. The manufacturer and device codes are the same for
both modes.
128-BIT PROTECTION REGISTER: The AT49BV/LV16X(T) contains a 128-bit register that
can be used for security purposes in system design. The protection register is divided into two
64-bit blocks. The two blocks are designated as block A and block B. The data in block A is
non-changeable and is programmed at the factory with a unique number. The data in block B
is programmed by the user and can be locked out such that data in the block cannot be repro-
grammed. To program block B in the protection register, the four-bus cycle Program
Protection Register command must be used as shown in the “Command Definition in Hex”
table on page 13. To lock out block B, the four-bus cycle Lock Protection Register command
must be used as shown in the “Command Definition in Hex” table on page 13. Data bit D1
must be zero during the fourth bus cycle. All other data bits during the fourth bus cycle are
don’t cares. To determine whether block B is locked out, the Product ID Entry command is
given followed by a read operation from address 80H. If data bit D1 is zero, block B is locked.
If data bit D1 is one, block B can be reprogrammed. Please see the “Protection Register
Addressing Table” on page 14 for the address locations in the protection register. To read the
protection register, the Product ID Entry command is given followed by a normal read opera-
tion from an address within the protection register. After determining whether block B is
protected or not, or reading the protection register, the Product ID Exit command must be
given prior to performing any other operation.
9
AT49BV/LV160(T)/161(T)
1427L–FLASH–02/03
RDY/BUSY: For the AT49BV/LV161(T), an open-drain READY/BUSY output pin provides
another method of detecting the end of a program or erase operation. RDY/BUSY
is actively
pulled low during the internal program and erase cycles and is released at the completion of
the cycle. The open-drain connection allows for OR-tying of several devices to the same
RDY/BUSY
line. Please see “Status Bit Table” on page 12 for more details.
HARDWARE DATA PROTECTION: The Hardware Data Protection feature protects against
inadvertent programs to the AT49BV/LV16X(T) in the following ways: (a) V
CC
sense: if V
CC
is
below 1.8V (typical), the program function is inhibited. (b) V
CC
power-on delay: once V
CC
has
reached the V
CC
sense level, the device will automatically time out 10 ms (typical) before pro-
gramming. (c) Program inhibit: holding any one of OE
low, CE high or WE high inhibits
program cycles. (d) Noise filter: pulses of less than 15 ns (typical) on the WE
or CE inputs will
not initiate a program cycle. (e) Program inhibit: V
PP
is less than V
ILPP
. (f) V
PP
power-on delay:
once V
PP
has reached 1.65V, program and erase operations can occur after 100 ns.
INPUT LEVELS: While operating with a 2.65V to 3.6V power supply, the address inputs and
control inputs (OE
, CE and WE) may be driven from 0 to 5.5V without adversely affecting the
operation of the device. The I/O lines can only be driven from 0 to V
CC
+ 0.6V.
OUTPUT LEVELS: For the AT49BV/LV160(T), output high levels (V
OH
) are equal to V
CCQ
-
0.2V (not V
CC
). For 2.65V - 3.6V output levels, V
CCQ
must be tied to V
CC
. For 1.8V - 2.2V out-
put levels, V
CCQ
must be regulated to 2.0V ± 10%, while V
CC
must be regulated to 2.65V - 3.0V
(for minimum power).
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AT49BV161-70TI

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IC FLASH 16M PARALLEL 48TSOP
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