2003 Oct 21 22
Philips Semiconductors Product specification
Car radio integrated signal processor TEF6890H
Notes
1. The LOW voltage of pin SCLG is influenced by V
SCL
: V
SCLG(LOW)
V
SCL(LOW)
+ 0.22 V.
2. The equivalent level voltage is that value of the level voltage (at pin LEVEL) which results in the same weak signal
control effect (for instance HCC roll-off) as the output value of the specified detector (USN, WAM and MPH).
3. Crosstalk between bus inputs and signal outputs:
G
step(fader)
step resolution gain
(fader)
see Table 60
G
fader
=0to15 dB 1 dB
G
fader
= 15 to 45 dB 2.5 dB
G
fader
= 45 to 51 dB 3 dB
G
fader
= 51 to 59 dB 4 dB
α
mute
audio mute volume control: mute and output
muted (bits MULF, MURF, MULR
and MURR)
90 −−dB
BEEP
f
beep
beep generator frequency see Table 69
BEF[1:0] = 00 500 Hz
BEF[1:0] = 01 1 kHz
BEF[1:0] = 10 2 kHz
BEF[1:0] = 11 3 kHz
V
beep(rms)
beep generator audio
level (RMS value)
see Table 68
BEL[2:0] = 000 0 mV
BEL[2:0] = 001 13.3 mV
BEL[2:0] = 010 18 mV
BEL[2:0] = 011 28 mV
BEL[2:0] = 100 44 mV
BEL[2:0] = 101 60 mV
BEL[2:0] = 110 90 mV
BEL[2:0] = 111 150 mV
THD
beep
total harmonic distortion
of beep generator
f
beep
= 1 kHz or 2 kHz −− 7%
Power-on reset (all registers in default setting, outputs muted, standby mode)
V
th(POR)
threshold voltage of
Power-on reset
6.3 V
SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT
α
ct
20log
V
bus(p-p)
V
o(rms)
---------------------
=
2003 Oct 21 23
Philips Semiconductors Product specification
Car radio integrated signal processor TEF6890H
handbook, full pagewidth
18
18
14
10
14
10
6
2
2
6
MHC330
10
V
o
(dB)
f
audio
(Hz)
10
2
10
3
10
4
10
5
+1.85
1.90
Fig.3 Equalizer bowing.
G
bass
= +12 and 12 dB.
G
treble
= +12 and 12 dB.
f
cut-off(treble)
= 10 kHz.
f
c(bass)
= 60 Hz.
2003 Oct 21 24
Philips Semiconductors Product specification
Car radio integrated signal processor TEF6890H
11 I
2
C-BUS PROTOCOL
Table 1 Write mode
Notes
1. S = START condition.
2. A = acknowledge.
3. P = STOP condition.
Table 2 Read mode
Notes
1. S = START condition.
2. A = acknowledge.
3. NA = not acknowledge.
4. P = STOP condition.
Table 3 IC address byte
Table 4 Description of IC address byte
11.1 Read mode
11.1.1 DATA BYTE 1; STATUS
Table 5 Format of data byte 1
S
(1)
address (write) A
(2)
subaddress A
(2)
data byte(s) A
(2)
P
(3)
S
(1)
address (read) A
(2)
data byte(s) A
(2)
data byte NA
(3)
P
(4)
IC ADDRESS MODE
001100ADDR R/
W
BIT SYMBOL DESCRIPTION
7to2 001100+(ADDR) = IC address.
1 ADDR Address bit. 0 = pin ADDR is grounded; 1 = pin ADDR is floating.
0R/
WRead/Write. 0 = write mode; 1 = read mode.
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
STIN ASIA AFUS POR ID2 ID1 ID0

TEF6890H/V3,557

Mfr. #:
Manufacturer:
NXP Semiconductors
Description:
IC RADIO SIGNAL PROC 44-QFP
Lifecycle:
New from this manufacturer.
Delivery:
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