2003 Oct 21 28
Philips Semiconductors Product specification
Car radio integrated signal processor TEF6890H
Table 18 Description of data byte 4H
11.2.3 SUBADDRESS 5H; CSALIGN
Table 19 Format of data byte 5H with default setting
Table 20 Description of data byte 5H
Table 21 FM stereo channel separation
BIT SYMBOL DESCRIPTION
7 STBR Standby mode RDS processing. 0 = RDS processing active; 1 = RDS processing in
standby mode (RDS off, RDS outputs LOW).
6 STBA Standby mode audio processing. 0 = audio processing active; 1 = audio processing
in standby mode (audio inputs and outputs at DC).
5 AFUM Enables AF update mute. 0 = AF update mute disabled; 1 = AF update mute enabled
(controlled by AFSAMP and AFHOLD input).
4 AFUH AF update hold function. 0 = disable, the weak signal processing hold is controlled by
the AFHOLD input only; 1 = hold. This is equal to taking the AFHOLD input LOW. The
bit is reset to 0, when AFHOLD input is set to LOW (i.e. at AF update or preset change).
3 RMUT Radio signal mute. 0 = no mute; 1 = mute with 1 ms ASI slope at start and stop.
2 − Not used. Set to logic 0.
1 LETF Fast level detector time constants. 0 = slow level detector time constants are used;
1 = fast level detector time constants are used. See Table 25.
0 ATTB Attack bound of the MPH and LEV detector. 0 = detectors are unbounded; 1 = range
of the MPH and LEV detector are limited in their range for immediate start of attack. In
AM mode the detectors are always unbounded.
BIT 7 BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1 BIT 0
CSR1 CSR0 CSA3 CSA2 CSA1 CSA0 −−
010111−−
BIT SYMBOL DESCRIPTION
7 and 6 CSR[1:0] FM stereo channel separation (high frequency). See Table 21.
5 to 2 CSA[3:0] FM stereo channel separation and adjustment. See Table 22.
1 and 0 − Not used. Set to logic 0.
CSR1 CSR0 FM STEREO CHANNEL SEPARATION (dB)
00 0
0 1 0.4
1 0 0.8
1 1 1.2