NCP3127
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10
when using electrolytic capacitors, a lower ripple current
will result in lower output ripple due to the higher ESR of
electrolytic capacitors. The ratio of ripple current to
maximum output current is given in Equation 5.
ra +
DI
Iout
(eq. 5)
DI = Ripple current
I
OUT
= Output current
ra = Ripple current ratio
Using the ripple current rule of thumb, the user can
establish acceptable values of inductance for a design using
Equation 6.
L
OUT
+
V
OUT
I
OUT
@ ra @ F
SW
@ (1 * D) ³
(eq. 6)
12.21 mH +
12 V
2.0 A 28% 350 kHz
@ (1 * 27.5%)
D = Duty ratio
F
SW
= Switching frequency
I
OUT
= Output current
L
OUT
= Output inductance
ra = Ripple current ratio
CURRENT RIPPLE RATIO (%)
Figure 21. Inductance vs. Current Ripple Ratio
INDUCTANCE (mH)
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
10 13 16 19 22 25 28 31 34 37 40
When selecting an inductor, the designer must not exceed
the current rating of the part. To keep within the bounds of
the part’s maximum rating, a calculation of the RMS and
peak inductor current is required.
I
RMS
+ I
OUT
@ 1 )
ra
2
12
Ǹ
³
(eq. 7)
2.01 A + 2.01 A * 1 )
32%
2
2
Ǹ
I
OUT
= Output current
I
RMS
= Inductor RMS current
ra = Ripple current ratio
I
PK
+ I
OUT
@
ǒ
1 )
ra
2
Ǔ
³ 2.28 A + 2.0 A @
ǒ
1 )
28%
2
Ǔ
(eq. 8)
I
OUT
= Output current
I
PK
= Inductor peak current
ra = Ripple current ratio
A standard inductor should be found so the inductor will
be rounded to 12 mH. The inductor should also support an
RMS current of 2.01 A and a peak current of 2.28 A.
The final selection of an output inductor has both
mechanical and electrical considerations. From a
mechanical perspective, smaller inductor values generally
correspond to smaller physical size. Since the inductor is
often one of the largest components in the regulation system,
a minimum inductor value is particularly important in space
constrained applications. From an electrical perspective, the
maximum current slew rate through the output inductor for
a buck regulator is given by Equation 9.
SlewRate
LOUT
+
V
IN
* V
OUT
L
OUT
³
(eq. 9)
0.72
A
ms
+
12 V * 3.3 V
12 mH
L
OUT
= Output inductance
V
IN
= Input voltage
V
OUT
= Maximum output voltage
Equation 9 implies that larger inductor values limit the
regulators ability to slew current through the output
inductor in response to output load transients. Consequently,
output capacitors must supply the load current until the
inductor current reaches the output load current level.
Reduced inductance to increase slew rates results in larger
values of output capacitance to maintain tight output voltage
regulation. In contrast, smaller values of inductance increase
the regulators maximum achievable slew rate and decrease
the necessary capacitance, at the expense of higher ripple
current. The peaktopeak ripple current for NCP3127 is
given by the following equation:
Ipp +
V
OUT
(1 * D)
L
OUT
@ F
SW
³
(eq. 10)
0.57 A +
3.3 V (1 * 27.5%)
12 mH @ 350 kHz
D = Duty ratio
F
SW
= Switching frequency
Ipp = Peaktopeak current of the inductor
L
OUT
= Output inductance
V
OUT
= Output voltage
From Equation 10 it is clear that the ripple current increases
as L
OUT
decreases, emphasizing the tradeoff between
dynamic response and ripple current.
The power dissipation of an inductor falls into two
categories: copper and core losses. The copper losses can be
further categorized into DC losses and AC losses. A good
first order approximation of the inductor losses can be made
using the DC resistance as shown below:
NCP3127
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11
LP
_DC
+ I
RMS
2
@ DCR ³
(eq. 11)
94 mW + 2.01 A
2
@ 23.27 mW
I
RMS
= Inductor RMS current
DCR = Inductor DC resistance
LP
CU_DC
= Inductor DC power dissipation
The core losses and AC copper losses will depend on the
geometry of the selected core, core material, and wire used.
Most vendors will provide the appropriate information to
make accurate calculations of the power dissipation at which
point the total inductor losses can be captured by the
equation below:
104 mW + 94 mW ) 0mW) 10 mW
(eq. 12)
LP
tot
+ LP
CU_DC
) LP
CU_AC
) LP
Core
³
LP
CU_DC
= Inductor DC power dissipation
LP
CU_AC
= Inductor AC power dissipation
LP
Core
= Inductor core power dissipation
Output Capacitor Selection
The important factors to consider when selecting an
output capacitor are DC voltage rating, ripple current rating,
output ripple voltage requirements, and transient response
requirements.
The output capacitor must be rated to handle the ripple
current at full load with proper derating. The RMS ratings
given in datasheets are generally for lower switching
frequency than used in switch mode power supplies, but a
multiplier is usually given for higher frequency operation.
The RMS current for the output capacitor can be calculated
below:
Co
RMS
+ I
OUT
@
ra
12
Ǹ
³ 0.164 A + 2.0 A
28%
12
Ǹ
(eq. 13)
Co
RMS
= Output capacitor RMS current
I
OUT
= Output current
ra = Ripple current ratio
The maximum allowable output voltage ripple is a
combination of the ripple current selected, the output
capacitance selected, the Equivalent Series Inductance
(ESL), and Equivalent Series Resitance (ESR).
The main component of the ripple voltage is usually due
to the ESR of the output capacitor and the capacitance
selected, which can be calculated as shown in Equation 14:
V
ESR_C
+ I
OUT
*ra*
ǒ
Co
ESR
)
1
8*F
SW
*C
OUT
Ǔ
³
(eq. 14)
28.9 mV + 3 * 28% *
ǒ
50 mW )
1
8 * 350 kHz * 470 mF
Ǔ
Co
ESR
= Output capacitor ESR
C
OUT
= Output capacitance
F
SW
= Switching frequency
I
OUT
= Output current
ra = Ripple current ratio
The ESL of capacitors depends on the technology chosen,
but tends to range from 1 nH to 20 nH, where ceramic
capacitors have the lowest inductance and electrolytic
capacitors have the highest. The calculated contributing
voltage ripple from ESL is shown for the switch on and
switch off below:
V
ESLON
+
ESL * Ipp * F
SW
D
³
(eq. 15)
7.25 mV +
10 nH * 0.57 A * 350 kHz
27.5%
V
ESLOFF
+
ESL*Ipp*F
SW
(
1 * D
)
³
(eq. 16)
2.75 mV +
10 nH * 0.57 A * 350 kHz
ǒ
1 * 27.5%
Ǔ
D = Duty ratio
ESL = Capacitor inductance
F
SW
= Switching frequency
Ipp = Peaktopeak current
The output capacitor is a basic component for the fast
response of the power supply. For the first few microseconds
of a load transient, the output capacitor supplies current to
the load. Once the regulator recognizes a load transient, it
adjusts the duty ratio, but the current slope is limited by the
inductor value.
During a load step transient, the output voltage initially
drops due to the current variation inside the capacitor and the
ESR (neglecting the effect of the ESL).
DV
OUT*ESR
+ I
TRAN
Co
ESR
³ 50 mV + 1.0 A 50 mW
(eq. 17)
Co
ESR
= Output capacitor Equivalent Series
Resistance
I
TRAN
= Output transient current
DV
OUT_ESR
= Voltage deviation of V
OUT
due to the
effects of ESR
A minimum capacitor value is required to sustain the
current during the load transient without discharging it. The
voltage drop due to output capacitor discharge is given by
the following equation:
DV
OUT*DIS
+
ǒ
I
TRAN
Ǔ
2
L
OUT
2 D
MAX
C
OUT
ǒ
V
IN
* V
OUT
Ǔ
³
(eq. 18)
1.96 mV +
ǒ
1A
Ǔ
2
12 mH
2 75% 470 mF
ǒ
12 V * 3.3 V
Ǔ
C
OUT
= Output capacitance
D
MAX
= Maximum duty ratio
I
TRAN
= Output transient current
L
OUT
= Output inductor value
V
IN
= Input voltage
V
OUT
= Output voltage
DV
OUT_DIS
= Voltage deviation of V
OUT
due to the
effects of capacitor discharge
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12
In a typical converter design, the ESR of the output
capacitor bank dominates the transient response. Please note
that DV
OUTDIS
and DV
OUTESR
are out of phase with each
other, and the larger of these two voltages will determine the
maximum deviation of the output voltage (neglecting the
effect of the ESL).
Input Capacitor Selection
The input capacitor has to sustain the ripple current
produced during the on time of the upper MOSFET, so it
must have a low ESR to minimize the losses. The RMS value
of the input ripple current is:
Iin
RMS
+ I
OUT
D (1 * D)
Ǹ
³
(eq. 19)
0.89 A + 2.0 A * 27.5% *
(
1 * 27.5%
)
Ǹ
D = Duty ratio
IIN
RMS
= Input capacitance RMS current
I
OUT
= Load current
The equation reaches its maximum value with D = 0.5.
Loss in the input capacitors can be calculated with the
following equation:
P
CIN
+ CIN
ESR
*
ǒ
IIN
RMS
Ǔ
2
³
(eq. 20)
7.98 mW + 10 mW *
ǒ
0.89 A
Ǔ
2
CIN
ESR
= Input capacitance Equivalent Series
Resistance
IIN
RMS
= Input capacitance RMS current
P
CIN
= Power loss in the input capacitor
Due to large di/dt through the input capacitors, electrolytic
or ceramics should be used. If a tantalum must be used, it
must be surge protected, otherwise, capacitor failure could
occur.
Power MOSFET Dissipation
MOSFET power dissipation, package size, and the
thermal environment drive power supply design. Once the
dissipation is known, the thermal impedance can be
calculated to prevent the specified maximum junction
temperatures from being exceeded at the highest ambient
temperature.
Power dissipation has two primary contributors:
conduction losses and switching losses. The highside
MOSFET will display both switching and conduction
losses. The switching losses of the low side MOSFET will
not be calculated as it switches into nearly zero voltage and
the losses are insignificant. However, the body diode in the
lowside MOSFET will suffer diode losses during the
nonoverlap time of the gate drivers.
Starting with the highside MOSFET, the power
dissipation can be approximated from:
P
D_HS
+ P
COND
) P
SW_TOT
(eq. 21)
P
COND
= Conduction power losses
P
SW_TOT
= Total switching losses
P
D_HS
= Power losses in the high side MOSFET
The first term in Equation 21 is the conduction loss of the
highside MOSFET while it is on.
P
COND
+
ǒ
I
RMS_HS
Ǔ
2
@ R
DS(on)_HS
(eq. 22)
I
RMS_HS
= RMS current in the highside MOSFET
R
DS(on)_HS
= On resistance of the highside MOSFET
P
cond
= Conduction power losses
Using the ra term from Equation 5, I
RMS
becomes:
I
RMS_HS
+ I
OUT
@ D @
ǒ
1 )
ra
2
12
Ǔ
Ǹ
(eq. 23)
I
RMS_HS
= High side MOSFET RMS current
I
OUT
= Output current
D = Duty ratio
ra = Ripple current ratio
The second term from Equation 21 is the total switching
loss and can be approximated from the following equations.
P
SW_TOT
+ P
SW
) P
DS
) P
RR
(eq. 24)
P
DS
= High side MOSFET drain source losses
P
RR
= High side MOSFET reverse recovery losses
P
SW
= High side MOSFET switching losses
P
SW_TOT
= High side MOSFET total switching losses
The first term for total switching losses from Equation 24
are the losses associated with turning the highside
MOSFET on and off and the corresponding overlap in drain
voltage and current.
P
SW
+ P
TON
) P
TOFF
(eq. 25)
+
1
2
@
ǒ
I
OUT
@ V
IN
@ F
SW
Ǔ
@
ǒ
t
RISE
) t
FALL
Ǔ
F
SW
= Switching frequency
I
OUT
= Load current
t
FALL
= MOSFET fall time
t
RISE
= MOSFET rise time
V
IN
= Input voltage
P
SW
= High side MOSFET switching losses
P
TON
= Turn on power losses
P
TOFF
= Turn off power losses

NCP3127ADR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Voltage Regulators - Switching Regulators 2A PWM Switching Buck Regulato
Lifecycle:
New from this manufacturer.
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