LTC3809
19
3809fc
Minimum On-Time Considerations
Minimum on-time, t
ON(MIN)
is the smallest amount of time
that the LTC3809 is capable of turning the top P-channel
MOSFET on. It is determined by internal timing delays and
the gate charge required to turn on the top MOSFET. Low
duty cycle and high frequency applications may approach
the minimum on-time limit and care should be taken to
ensure that:
t
V
fV
ON MIN
OUT
OSC IN
()
•
<
If the duty cycle falls below what can be accommodated
by the minimum on-time, the LTC3809 will begin to skip
cycles (unless forced continuous mode is selected). The
output voltage will continue to be regulated, but the ripple
current and ripple voltage will increase. The minimum on-
time for the LTC3809 is typically about 210ns. However,
as the peak sense voltage (I
L(PEAK
) • R
DS(ON)
) decreases,
the minimum on-time gradually increases up to about
260ns. This is of particular concern in forced continu-
ous applications with low ripple current at light loads. If
forced continuous mode is selected and the duty cycle
falls below the minimum on time requirement, the output
will be regulated by overvoltage protection.
Effi ciency Considerations
The effi ciency of a switching regulator is equal to the output
power divided by the input power times 100%. It is often
useful to analyze individual losses to determine what is
APPLICATIONS INFORMATION
INPUT VOLTAGE (V)
75
NORMALIZED VOLTAGE OR CURRENT (%)
85
95
105
80
90
100
2.2 2.4 2.6 2.8
3809 F09
3.02.12.0 2.3 2.5 2.7 2.9
V
REF
MAXIMUM
SENSE VOLTAGE
Figure 9. Line Regulation of V
REF
and Maximum Sense Voltage
limiting effi ciency and which change would produce the
most improvement. Effi ciency can be expressed as:
Effi ciency = 100% – (L1 + L2 + L3 + …)
where L1, L2, etc. are the individual losses as a percent-
age of input power.
Although all dissipative elements in the circuit produce
losses, four main sources usually account for most of the
losses in LTC3809 circuits: 1) LTC3809 DC bias current,
2) MOSFET gate-charge current, 3) I
2
R losses and
4) transition losses.
1) The V
IN
(pin) current is the DC supply current, given
in the Electrical Characteristics, which excludes MOSFET
driver currents. V
IN
current results in a small loss that
increases with V
IN
.
2) MOSFET gate-charge current results from switching
the gate capacitance of the power MOSFET. Each time a
MOSFET gate is switched from low to high to low again,
a packet of charge dQ moves from V
IN
to ground. The
resulting dQ/dt is a current out of V
IN
, which is typically
much larger than the DC supply current. In continuous
mode, I
GATECHG
= f • Q
P
.
3) I
2
R losses are calculated from the DC resistances of the
MOSFETs, inductor and/or sense resistor. In continuous
mode, the average output current fl ows through L but is
“chopped” between the top P-channel MOSFET and the
bottom N-channel MOSFET. The MOSFET R
DS(ON)
mul-
tiplied by duty cycle can be summed with the resistance
of L to obtain I
2
R losses.
4) Transition losses apply to the external MOSFET and
increase with higher operating frequencies and input
voltages. Transition losses can be estimated from:
Transition Loss = 2 • V
IN
2
• I
O(MAX)
• C
RSS
• f
Other losses, including C
IN
and C
OUT
ESR dissipative losses
and inductor core losses, generally account for less than
2% total additional loss.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, V
OUT
immediately shif ts by an amount
