NCL30001
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19
rating compared to similar dc−input flyback
applications.
Figure 47. Typical Drain Voltage Waveform of a
Flyback Main Switch
There are two methods to clamp the voltage spike on the
main switch, a resistor−capacitor−diode (RCD) clamp or a
transient voltage suppressor (TVS).
R
RCD
Clamp
V
out
Figure 48. RCD Clamp
V
in
C
D
TVS
TVS
Clamp
V
out
Figure 49. TVS Clamp
V
in
Both methods result in dissipation of the leakage energy
in the clamping circuits – the dissipation is proportional to
LI
2
where L is the leakage inductance of the transformer and
I is the peak of the switch current at turn−off. An RCD
snubber is simple and has the lowest cost, but constantly
dissipates power. A TVS provides good voltage clamping at
a slightly higher cost and dissipates power only when the
drain voltage exceeds the voltage rating of the TVS.
Other features found in the NCL30001 include a high
voltage startup circuit, voltage feedforward, brown out
detector, internal overload timer, latch input and a high
accuracy multiplier.
NCL30001 PFC Loop
The NCL30001 incorporates a modified version of
average current mode control used for achieving the unity
power factor. The PFC section includes a variable reference
generator, a low frequency voltage regulation error
amplifier (AC error AMP), ramp compensation (Ramp
Comp) and current shaping network. These blocks are
shown in the lower portion of the bock diagram (Figure 45).
The inputs to the reference generator include feedback
signal (FB), scaled AC input signal (AC_IN) and
feedforward input (V
FF
). The output of the reference
generator is a rectified version of the input sine−wave scaled
by the FB and V
FF
values. The reference amplitude is
proportional to the FB and inversely proportional to the
square of the V
FF
. This, for higher load levels and/or lower
input voltage, the signal would be higher.
The function of the AC error amp is to force the average
current output of the current sense amplifier to match the
reference generator output. The output of the AC error
amplifier is compensated to prevent response to fast events.
This output (V
error
) is fed into the PWM comparator through
a reference buffer. The PWM comparator sums the V
error
and
the instantaneous current and compares it to a 4.0 V
threshold to provide the desired duty cycle control. Ramp
compensation is also added to the input signal to allow CCM
operation above 50% duty cycle.
High Voltage Startup Circuit
The NCL30001 internal high voltage startup circuit
eliminates the need for external startup components and
provides a faster startup time compared to an external
startup resistor. The startup circuit consists of a constant
current source that supplies current from the HV pin to the
supply capacitor on the V
CC
pin (C
CC
). The startup current
(I
start
) is typically 5.5 mA.
The DRV driver is enabled and the startup current source
is disabled once the V
CC
voltage reaches V
CC(on)
, typically
15.4 V. The controller is then biased by the V
CC
capacitor.
The drivers are disabled if V
CC
decays to its minimum
operating threshold (V
CC(off)
) typically 10.2 V. Upon
reaching V
CC(off)
the gate driver is disabled. The V
CC
capacitor should be sized such V
CC
is kept above V
CC(off)
while the auxiliary voltage is building up. Otherwise, the
system will not start.
The controller operates in double hiccup mode while in
overload or V
CC(off)
. A double hiccup fault disables the
drivers, sets the controller in a low current mode and allows
V
CC
to discharge to V
CC(off)
. This cycle is repeated twice to
minimize power dissipation in external components during
