LTC3785
6
3785fc
pin FuncTions
V
SENSE
(Pin 4): Overvoltage and Undervoltage Sense.
The overvoltage threshold is internally set 10% above
the regulated FB voltage and the undervoltage threshold
is internally set 6.5% below the FB regulated voltage. This
pin can be tied to FB but to optimize the response time it
is recommended that a voltage divider from V
OUT
be ap-
plied. The divider can be skewed from the feedback value
to achieve the desired UV or OV threshold.
I
LSET
(Pin 5): Current Limit Set. A resistor from this pin
to ground sets the current limit threshold from the I
SVIN
and I
SSW1
pins.
CCM (Pin 6): Continuous Conduction Mode Control Pin.
When set low, the inductor current is allowed to go slightly
negative (–15mV referenced to the I
SVOUT
– I
SSW2
pins).
When driven high, the reverse current limit is set to the
similar value of the forward current limit set by the I
LSET
pin.
RT (Pin 7): Oscillator Programming Pin. A resistor from this
pin to GND sets the free-running frequency of the IC.
f
R
MHz
OSC
T
≅
25000
MODE (Pin 8): Burst Mode Control Pin.
• MODE = High: Enable Burst Mode Operation. In Burst
Mode operation the operation is variable frequency,
which provides a significant efficiency improvement
at light loads. The Burst Mode operation will continue
until the pin is driven low.
•
M
ODE = Low: Disable Burst Mode operation and maintain
low noise, constant frequency operation.
NC (Pin 9): No Connect. There is no electrical connection
to this pin inside the package.
I
SVOUT
(Pin 10): Reverse Current Limit Comparator Non-
inverting Input. This pin is normally connected to the drain
of the N-channel MOSFET D (TG2 driven).
V
BST2
(Pin 11): Boosted Floating Driver Supply for Boost
Switch D. This pin will swing from a diode below V
CC
up
to V
OUT
+ V
CC
– V
DIODE
.
SW2 (Pin 13): Ground Reference for Driver D. Gate drive
from TG2 will reference to the common point of output
switches C and D.
I
SSW2
(Pin 14): Reverse Current Limit Comparator Invert-
ing Input. This pin is normally connected to the source of
the N-channel MOSFET D (TG2 driven).
V
DRV
(Pin 16): Driver Supply for Ground Referenced
Switches. Connect this pin to V
CC
potential.
BG1, BG2 (Pins 17, 15): Bottom gate driver pins drive
the ground referenced N-channel MOSFET switches B
and C.
I
SSW1
(Pin 18): Forward Current Limit Comparator Non-
inverting Input. This pin is normally connected to the
source of the N-channel MOSFET A (TG1 driven).
SW1 (Pin 19): Ground Reference for Driver A. Gate drive
from TG1 will reference to the common point of output
switches A and B.
TG1, TG2 (Pins 20, 12): Top gate drive pins drive the
top N-channel MOSFET switches A and D with a voltage
swing equal to V
CC
– V
DIODE
superimposed on the SW1
and SW2 nodes respectively.
V
BST1
(Pin 21): Boosted Floating Driver Supply for the
Buck Switch A. This pin will swing from a diode below
V
CC
up to V
IN
+ V
CC
– V
DIODE
.
I
SVIN
(Pin 22): Forward Current Limit Comparator Invert-
ing Input. This pin is normally connected to the drain of
N-channel MOSFET A (TG1 driven).
V
CC
(Pin 23): Internal 4.35V LDO Regulator Output. The
driver and control circuits are powered from this voltage
to limit the maximum VGS drive voltage. Decouple this pin
to power ground with at least a 4.7µF ceramic capacitor.
For low V
IN
applications, V
CC
can be bootstrapped from
V
OUT
through a Schottky diode.
V
IN
(Pin 24): Input Supply Pin for the V
CC
Regulator. A
ceramic capacitor of at least 10µF is recommended close
to the V
IN
and GND pins.
Ground (Exposed Pad Pin 25): The GND and PGND pins
are connected to the exposed pad which must be con-
nected to the PCB ground for electrical contact and rated
thermal performance.
