LTC6087/LTC6088
10
60878fc
applications inForMation
Rail-to-Rail Output
The output stage of the LTC6087/LTC6088 swings within
30mV of the supply rails when driving high impedance
loads, in other words when no DC load current is present.
See the Typical Performance Characteristics for curves of
output swing versus load current. The class AB design of
the output stage enables the op amp to supply load cur-
rents which are much greater than the quiescent supply
current. For example, the room temperature short circuit
current is typically 45mA.
Capacitive Load
LTC6087/LTC6088 can drive capacitive load up to 100pF in
unity gain. The capacitive load driving capability increases
as the amplifier is used in higher gain configurations. A
small series resistance between the output and the load
further increases the amount of capacitance the amplifier
can drive.
SHDN Pins
Pins 5 and 6 are used for power shutdown when the
LTC6087 is in the DD package. If they are floating, internal
current sources pull Pins 5 and 6 to V
+
and the amplifiers
operate normally. In shutdown the amplifier output is
high impedance and each amplifier draws less thanA
current. This feature allows the part to be used in muxed
output applications as shown
in Figure 3.
ESD
The
LTC6087/LTC6088 has reverse-biased ESD protection
diodes on all inputs and outputs as shown in the Simplified
Schematic. If these pins are forced beyond either supply,
unlimited current will flow through these diodes. If the
current is transient and limited to one hundred milliamps
or less, no damage to the device will occur.
The amplifier input bias current is the leakage current of
these ESD diodes. This leakage is a function of the tem-
perature and common mode voltage of the amplifier, as
shown in the Typical Performance Characteristics.
Noise
In the frequency region above 1kHz, the LTC6087/LTC6088
shows good noise voltage performance. In this region,
noise can be dominated by the total source resistance of
the particular application. Specifically, these amplifiers
exhibit the noise of a 10k resistor, meaning it is desirable
to keep the source and feedback resistance at or below
this value, i.e., R
S
+ R
G
||R
FB
≤ 10k. Above this total source
impedance, the noise voltage is dominated by the resistor.
At low frequency, noise current can be estimated from the
expression in = √2qI
B
, where q = 1.6 10
–19
coulombs.
Equating4kTRΔ
f and R√2qI
B
Δf shows that for source
resistor below 50GΩ the amplifier noise is dominated by
the source resistance. Noise current rises with frequency.
See the curve Noise Current vs Frequency in the Typical
Performance Characteristics section.
Figure 3. Inverting Amplifier with Muxed Output
+
10k
10k
10k
10k
10pF
10pF
OUT
LTC6087
(DD PACKAGE)
SEL = 5V, OUT = –INA
SEL = 0V, OUT = –1NB
10k 10k
SHDN
A
SHDN
B
FAIRCHILD
NC7SZ04 OR
EQUIVALENT
5V
A
5V
INA
5V
10k
10k
5V
60878 F03
INB
SEL
+
B
LTC6087/LTC6088
11
60878fc
siMpliFieD scheMatic
R1 R2
R3
V
+
V
R4
+
D8
D7
OUT
M8
M9
C1
C2
60878 SS
V
+
V
D5
D6
+
OUTPUT
CONTROL
M4
M6
A1
A2
M7
M5
I
1
V
BIAS
M1 M2
M3
–IN
V
+
V
V
+
V
D3
D4
+IN
V
M11M10
1µA
V
+
V
D1
D2
SHDN
BIAS
GENERATION
NOTE: SHDN IS ONLY AVAILABLE
IN THE DFN10 PACKAGE
I
2
package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MSOP (MS8) 0307 REV F
0.53 ±0.152
(.021 ±.006)
SEATING
PLANE
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED
0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE
0.102mm (.004") MAX
0.18
(.007)
0.254
(.010)
1.10
(.043)
MAX
0.22 – 0.38
(.009 – .015)
TYP
0.1016 ±0.0508
(.004 ±.002)
0.86
(.034)
REF
0.65
(.0256)
BSC
0° – 6° TYP
DETAIL “A”
DETAIL “A”
GAUGE PLANE
1 2
3
4
4.90 ±0.152
(.193 ±.006)
8
7
6
5
3.00 ±0.102
(.118 ±.004)
(NOTE 3)
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
0.52
(.0205)
REF
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
0.889 ±0.127
(.035 ±.005)
RECOMMENDED SOLDER PAD LAYOUT
0.42 ± 0.038
(.0165 ±.0015)
TYP
0.65
(.0256)
BSC
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660 Rev F)
LTC6087/LTC6088
12
60878fc
package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
3.00 ±0.10
(4 SIDES)
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
0.40 ±0.10
BOTTOM VIEW—EXPOSED PAD
1.65 ±0.10
(2 SIDES)
0.75 ±0.05
R = 0.125
TYP
2.38 ±0.10
(2 SIDES)
15
106
PIN 1
TOP MARK
(SEE NOTE 6)
0.200 REF
0.00 – 0.05
(DD) DFN REV C 0310
0.25 ±0.05
2.38 ±0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
1.65 ±0.05
(2 SIDES)2.15 ±0.05
0.50
BSC
0.70 ±0.05
3.55 ±0.05
PACKAGE
OUTLINE
0.25 ±0.05
0.50 BSC
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev C)
PIN 1 NOTCH
R = 0.20 OR
0.35 × 45°
CHAMFER

LTC6087CDD#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Precision Amplifiers 2x 14MHz, R2R CMOS Amps
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union