FUNCTIONAL BLOCK DIAGRAM
REV. A
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a
16-Bit Monotonic
Voltage Output D/A Converter
AD569
FEATURES
Guaranteed 16-Bit Monotonicity
Monolithic BiMOS II Construction
60.01% Typical Nonlinearity
8- and 16-Bit Bus Compatibility
3 ms Settling to 16 Bits
Low Drift
Low Power
Low Noise
APPLICATIONS
Robotics
Closed-Loop Positioning
High-Resolution ADCs
Microprocessor-Based Process Control
MIL-STD-883 Compliant Versions Available
PRODUCT DESCRIPTION
The AD569 is a monolithic 16-bit digital-to-analog converter
(DAC) manufactured in Analog Devices’ BiMOS II process.
BiMOS II allows the fabrication of low power CMOS logic
functions on the same chip as high precision bipolar linear cir-
cuitry. The AD569 chip includes two resistor strings, selector
switches decoding logic, buffer amplifiers, and double-buffered
input latches.
The AD569’s voltage-segmented architecture insures 16-bit
monotonicity over time and temperature. Integral nonlinearity is
maintained at ±0.01%, while differential nonlinearity is
±0.0004%. The on-chip, high-speed buffer amplifiers provide a
voltage output settling time of 3 µs to within ±0.001% for a
full-scale step.
The reference input voltage which determines the output range
can be either unipolar or bipolar. Nominal reference range is
±5 V and separate reference force and sense connections are
provided for high accuracy applications. The AD569 can oper-
ate with an ac reference in multiplying applications.
Data may be loaded into the AD569’s input latches from 8- and
16-bit buses. The double-buffered structure simplifies 8-bit bus
interfacing and allows multiple DACs to be loaded asynchro-
nously and updated simultaneously. Four TTL/LSTTL/5 V
CMOS-compatible signals control the latches:
CS, LBE, HBE,
and
LDAC
The AD569 is available in five grades: J and K versions are
specified from 0°C to +70°C and are packaged in a 28-pin plas-
tic DIP and 28-pin PLCC package; AD and BD versions are
specified from –25°C to +85°C and are packaged in a 28-pin
ceramic DIP. The SD version, also in a 28-pin ceramic DIP, is
specified from –55°C to +125°C.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700 Fax: 617/326-8703
PRODUCT HIGHLIGHTS
1. Monotonicity to 16 bits is insured by the AD569’s voltage-
segmented architecture.
2. The output range is ratiometric to an external reference or ac
signal. Gain error and gain drift of the AD569 are negligible.
3. The AD569’s versatile data input structure allows loading
from 8- and 16-bit buses.
4. The on-chip output buffer amplifier can supply ±5 V into a
1 k load, and can drive capacitive loads of up to 1000 pF.
5. Kelvin connections to the reference inputs preserve the gain
and offset accuracy of the transfer function in the presence of
wiring resistances and ground currents.
6. The AD569 is available in versions compliant with MIL-STD-
883. Refer to the Analog Devices Military Products Data-
book or current AD569/883B data sheet for detailed
specifications.
AD569* PRODUCT PAGE QUICK LINKS
Last Content Update: 02/23/2017
COMPARABLE PARTS
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DOCUMENTATION
Data Sheet
AD569: 16-Bit Monotonic Voltage Output D/A Converter
Data Sheet
REFERENCE MATERIALS
Solutions Bulletins & Brochures
Digital to Analog Converters ICs Solutions Bulletin
DESIGN RESOURCES
AD569 Material Declaration
PCN-PDN Information
Quality And Reliability
Symbols and Footprints
DISCUSSIONS
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SAMPLE AND BUY
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TECHNICAL SUPPORT
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number.
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AD569–SPECIFICATIONS
Model AD569JN/JP/AD AD569KN/KP/BD AD569SD
Parameter Min Typ Max Min Typ Max Min Typ Max Units
RESOLUTION 16 16 16 Bits
LOGIC INPUTS
V
IH
(Logic “l”) 2.0 5.5 2.0 5.5 2.0 5.5 Volts
V
IL
(Logic “0”) 0 0.8 0 0.8 0 0.8 Volts
I
IH
(V
IH
= 5.5 V) 10 10 10 µA
I
IL
(V
IL
= 0 V) 10 10 10 µA
TRANSFER FUNCTION
CHARACTERISTICS
Integral Nonlinearity ±0.02
6
0.04 ±0.01
6
0.024
6
0.04 % FSR
1
T
MIN
to T
MAX
±0.02
6
0.04 ±0.020
6
0.024
6
0.04 % FSR
Differential Nonlinearity ±1/2
6
1 ±1/4
6
1/2
6
1 LSB
T
MIN
to T
MAX
±1/2
6
1 ±1/2
6
1
6
1 LSB
Unipolar Offset
2
6
500
6
350
6
500 µV
T
MIN
to T
MAX
6
750
6
450
6
750 µV
Bipolar Offset
2
6
500
6
350
6
500 µV
T
MIN
to T
MAX
6
750
6
450
6
750 µV
Full Scale Error
2
6
350
6
350
6
350 µV
T
MIN
to T
MAX
6
750
6
750
6
750 µV
Bipolar Zero
2
6
0.04
6
0.024
6
0.04 % FSR
T
MIN
to T
MAX
6
0.04
6
0.024
6
0.04 % FSR
REFERENCE INPUT
+V
REF
Range
3
–5 +5 –5 +5 –5 +5 Volts
–V
REF
Range –5 +5 –5 +5 –5 +5 Volts
Resistance 15 20 25 15 20 25 15 20 25 k
4
OUTPUT CHARACTERISTICS
Voltage –5 +5 –5 +5 –5 +5 Volts
Capacitive Load 1000 1000 1000 pF
Resistive Load 1 1 1 k
Short Circuit Current 10 10 10 mA
POWER SUPPLIES
Voltage
+V
S
+10.8 +12 +13.2 +10.8 +12 +13.2 +10.8 +12 +13.2 Volts
–V
S
–10.8 –12 –13.2 –10.8 –12 –13.2 –10.8 –12 –13.2 Volts
Current
+I
S
+9 +13 +9 +13 +9 +13 mA
–I
S
–9 –13 –9 –13 –9 –13 mA
Power Supply Sensitivity
5
+10.8 V +V
S
+13.2 V ±0.5 62 ±0.5 62 ±0.5 62 ppm/%
–10.8 V –V
S
–13.2 V ±1 63 ±1 63 ±1 63 ppm/%
TEMPERATURE RANGE
Specified
JN, KN, JP, KP 0 +70 0 +70 °C
AD, BD –25 +85 –25 +85 °C
SD –55 +125 °C
Storage
JN, KN, JP, KP –65 +150 –65 +150 °C
AD, BD, SD –65 +150 –65 +150 –65 +150 °C
NOTES
1
FSR stands for Full-Scale Range, and is 10 V for a –5 V to +5 V span.
2
Refer to Definitions section.
3
For operation with supplies other than ±12 V, refer to the Power Supply and Reference Voltage Range Section.
4
Measured between +V
REF
Force and –V
REF
Force.
5
Sensitivity of Full-Scale Error due to changes in +V
S
and sensitivity of Offset to changes in –V
S
.
Specifications subject to change without notice.
Specifications shown in boldface are tested on all production units at final electrical test. Results from those tests are used to calculate outgoing quality levels. All min
and max specifications are guaranteed, although only those shown in boldface are tested on all production units.
(T
A
= +258C, +V
S
= +12 V, –V
S
= –12 V, +V
REF
= +5 V, –V
REF
= –5 V, unless
otherwise noted.)
REV. A
–2–

AD569JNZ

Mfr. #:
Manufacturer:
Description:
IC DAC 16BIT MONO 28-DIP
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