PI6C48543
3.3V Low Skew 1-to-4, 800MHz,
Differential to LVDS Fanout Buffer
5
PS8771B 10/02/08
AC Characteristics (T
A
= -40
o
C to 85
o
C, V
CC
= 3.135V to 3.465V)
Symbol Parameter Conditions Min. Typ. Max. Units
f
max
Output Frequency 800 MHz
t
Pd
Propagation Delay
(1)
f ≤ 800 MHz 1.0 2.2 ns
Tsk(o) Output-to-output Skew
(2)
40
psTsk(pp) Part-to-part Skew
(3)
300
t
r
/t
f
Output Rise/Fall time 20% - 80% 100 300
odc Output duty cycle 48 52 %
Notes:
1. Measured from the differenital input crossing point to the differential output crossing point
2 Skew between outputs with the same supply voltage and equal load conditions. Measured at the differential outputs crossing point.
3. Skew between outputs on different parts operating with the same supply voltage and equal load conditions. Measured at the differential out-
puts crossing point.
4. All parameters are measured at 500 MHz unless noted otherwise
LVDS DC Characteristics (T
A
= -40
o
C to 85
o
C, V
CC
= 3.135V to 3.465V unless otherwise stated below.)
Symbol Parameter Conditions Min. Typ. Max. Units
V
OD
Differential Output Voltage 200 280 360
mV
∆V
OD
VOD Magnitude Change 0 40
V
OS
Offset Voltage 1.125 1.25 1.375 V
∆V
OS
VOS Magnitude Change 5 25 mV
I
OZ
High Impedance Leakage Current -10 +10
μA
I
OFF
Power OFF Leakage -20 ±1 +20
I
OSD
Differential Output Short Circuit Current -3.5 -5
mA
I
OS
Output Short Circuit Current -3.5 -5
V
OH
Output Voltage High 1.34 1.6
V
V
OL
Output Voltage Low 0.9 1.06
Applications Information
Wiring the differential input to accept single ended levels
Figure 1 shows how the differential input can be wired to accept single ended levels. The reference voltage V_REF = V
DD
/2 is
generated by the bias resistors R1, R2 and C1. This bias circuit should be located as close as possible to the input pin. The ratio of
R1 and R2 might need to be adjusted to postion the V_REF in the center of the input voltage swing. For example, if the input clock
swing is only 2.5V and V
DD
= 3.3V, V_REF should be 1.25V and R1/R2 = 0.609.
