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NCP1256ESN65T1G

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24
NCP1256
www.onsemi.com
4
S
R
Q
Q
65/100
kHz clock
Jitter
mod.
Vcc
Drv
Vcc and logic
management
Vdd
power
on reset
LEB1
vdd
/ 3
4 ms
SS
Power on
reset
GND
CS
FB
1−us time
constant
Frequency
foldback
Vskip
Vlatch1
Vfold
S
R
Q
Q
Clamp
Up counter
4
double
hiccup
RST
Event
gone?
peak current
freeze
VFB < 0.75 V ? setpoint = 250 mV
UVLO
BO
VBO1
VBO2
BO
VOVP
20 us
Ip
flag = 1 if over current
−−> start timer −−> auto rec.
+
invert
slope compensation
vdd
OPPGM
IOPPLL
Vlatch2
RFB
Validated
during off time
(option)
ICSO
Pre−short
Latched OCP
(option)
UVLO?
checked at
PON only
latched OCP opt.
Iopp3
VFB < VfoldF Iopp3 = 0
VFB > VoppF Iopp3 = I1
I2=0
I1=I2
VFB
RdBO
DZBO
I1
I2
BO
reset
= 1 if timer
completed
OCP timer completed
Auto−recovery dble hiccup
OVP on BO
OVP on CS
Logic
mngt
1−us time
constant
Figure 4. Internal Block Diagram
Auto−recovery
for E version
no clamp
for E version
Table 3. MAXIMUM RATINGS TABLE
Symbol Rating Value Unit
V
cc
Power Supply voltage, V
cc
pin, continuous voltage −0.3 to 28 V
Maximum voltage on low power pins CS, FB and BO −0.3 to 10 V
V
DRV
Maximum voltage on DRV pin −0.3 to V
cc
+0.3 V
R
θ
J−A
Thermal Resistance Junction−to−Air 360 °C/W
T
J,max
Maximum Junction Temperature 150 °C
Storage Temperature Range −60 to +150 °C
HBM Human Body Model ESD Capability per JEDEC JESD22−A114F 4 kV
MM Machine Model ESD Capability per JEDEC JESD22−A115C 200 V
CDM Charged−Device Model ESD Capability per JEDEC JESD22−C101E 750 V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
NCP1256
www.onsemi.com
5
Table 4. ELECTRICAL CHARACTERISTICS
(For typical values T
J
= 25°C, for min/max values T
J
= −40°C to +125°C, Max T
J
= 150°C, V
cc
= 12 V unless otherwise noted)
Symbol
Rating Pin Min Typ Max Unit
SUPPLY SECTION
VCC
ON
V
CC
increasing level at which driving pulses are authorized 5 16 18 20 V
VCC
(min)
V
CC
decreasing level at which driving pulses are stopped 5 8.3 8.9 9.5 V
VCC
HYST
Hysteresis Vcc
ON
−Vcc
(min)
5 8 − − V
VCC
reset
Latched state reset voltage 5 V
CC(min)
−2
50 mV
V
ICC
1
Start−up current 5 10
mA
ICC
2
Internal IC consumption with V
FB
= 3.2 V and C
L
= 0
F
SW
= 65 kHz
F
SW
= 100 kHz
5
−
−
1.30
1.35
−
−
mA
ICC
3
Internal IC consumption with V
FB
= 3.2 V and C
L
= 1 nF
F
SW
= 65 kHz
F
SW
= 100 kHz
5
−
−
1.8
2.5
−
−
mA
I
dis
Natural part consumption in hiccup mode – non switching 5 350
mA
ICC
stby
Static consumption between two skip cycles 5 420
mA
ICC
noload
Internal IC consumption while in skip mode (V
cc
= 14 V, driving a typi-
cal 7−A/600−V MOSFET, includes opto current) (Note 1)
5 440
mA
DRIVE SECTION
T
r
Output voltage rise−time @ CL = 1 nF, 10−90% of output signal 6 − 40 − ns
T
f
Output voltage fall−time @ CL = 1 nF, 10−90% of output signal 6 − 30 − ns
R
OH
Source resistance 6 − 13 −
W
R
OL
Sink resistance 6 − 6 −
W
I
source
Peak source current, V
GS
= 0 V (Note 2) 6 500 mA
I
sink
Peak sink current, V
GS
= 12 V (Note 2) 6 500 mA
V
DRVlow
DRV pin level at V
CC
close to VCC
(min)
with a 33−kW resistor to GND
6 8 − − V
V
DRVhigh
DRV pin level at V
CC
= V
OVP
−0.2 V – DRV unloaded 6 10 12 14 V
CURRENT COMPARATOR
V
Limit
Maximum internal current setpoint – no OPP 4 0.744 0.8 0.856 V
V
foldI
Default internal voltage set point for frequency foldback trip point ≈ 63%
of V
limit
4 500 mV
V
freezeI
Internal peak current setpoint freeze (≈31% of V
limit
) 4 250 mV
T
DEL
Propagation delay from current detection to gate off−state 4 40 60 ns
T
LEB1
Leading Edge Blanking Duration – first OCP path 4 300 ns
T
SS
Internal soft−start duration activated upon startup, auto−recovery − 4 ms
I
CSO
Internal pull−up source for pin opening safety test 4 1
mA
I
OPP1
Voltage on V
FB
< V
foldF
, percentage of applied OPP current 4 0 %
I
OPP2
Voltage on V
FB
> V
foldF
+ 0.7 V, percentage of applied OPP current 4 100 %
I
OPP3
Voltage on pin 3 = 2.65 V (265 V rms in) AND V
FB
> V
foldF
4 170 185 210
mA
I
OPP3clp
Voltage on pin 3 > 2.65 V – clamped OPP current 4 185
mA
I
OPPLL
OPP current delivered from CS pin for V
pin3
= V
BOon
4 6
mA
OPPg
m
Internal OTA for OPP current generation from BO 4 105 115 125
mS
1. For information only, collected on a typical 45−W adapter.
2. Guaranteed by design
3. Not tested in production.
NCP1256
www.onsemi.com
6
Table 4. ELECTRICAL CHARACTERISTICS
(For typical values T
J
= 25°C, for min/max values T
J
= −40°C to +125°C, Max T
J
= 150°C, V
cc
= 12 V unless otherwise noted)
Symbol UnitMaxTypMinPinRating
INTERNAL OSCILLATOR
f
OSC,nom
Oscillation Frequency
65 kHz version
100 kHz version
−
61
93
65
100
70
107
kHz
D
max
Maximum duty ratio − 77 80 83 %
f
jitter
Frequency jittering in percentage of f
OSC
− ±5 %
f
swing
Swing frequency over the whole frequency range − 240 Hz
FEEDBACK SECTION
R
up
Internal pull−up resistor 2 30
kW
R
eq
Equivalent ac resistance from FB to gnd 2 19 23 26
kW
I
ratio
Pin 2 to current setpoint division ratio − 3
V
freezeF
Feedback voltage below which the peak current is frozen 2 0.75 V
FREQUENCY FOLDBACK
V
foldF
Frequency foldback level on the feedback pin – ≈63% of maximum
peak current
− 1.5 V
F
trans
Minimum operating frequency − 22 26 30 kHz
V
fold,end
End of frequency foldback feedback level, F
sw
= F
trans
1.2 V
V
skip
Skip−cycle level voltage on the feedback pin − 0.6 V
Skip
hysteresis
Hysteresis on the skip comparator (Note 3) − 45 mV
INTERNAL SLOPE COMPENSATION
S
65
Compensation ramp slope, F
sw
= 65 kHz 30
mV/ms
S
100
Compensation ramp slope, F
sw
= 100 kHz 50
mV/ms
PROTECTIONS
V
latch1
Latching level input, brown−out input 3 4.3 4.5 4.7 V
V
latch2
Latching level, current sense input, off time only 4 1.45 1.5 1.55 V
T
latch−count
Number of clock cycles before latch confirmation from pin 3&4 − 4
T
latch−del
OVP detection time constant − 1
ms
Timer Internal auto−recovery fault timer duration − 50 70 90 ms
V
OVP
Latched over voltage protection on the V
cc
rail 6 25.3 26 26.8 V
T
OVP
−del Delay before OVP confirmation on V
cc
6 25
ms
I
BO
Brown−Out input bias current, V
BO
< D
ZBO
3 0.02
mA
V
BOon
Turn−on voltage 3 0.76 0.8 0.87 V
V
BOoff
Turn−off voltage 3 0.66 0.7 0.74 V
T
BO
De−bouncing filter on BO comparator 3 50
ms
R
dBO
Dynamic Zener diode resistance (all versions except E) 3 1
kW
D
ZBO
Active Zener diode clamping BO signal (all versions except E) 3 3.1 3.3 3.5 V
1. For information only, collected on a typical 45−W adapter.
2. Guaranteed by design
3. Not tested in production.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24

NCP1256ESN65T1G

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Buy NCP1256ESN65T1G
Manufacturer:
ON Semiconductor
Description:
Switching Controllers NCP1256E 65KHZ
Lifecycle:
New from this manufacturer.
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