Rev. C 03/14
3
CHY100
www.powerint.com
Functional Description
CHY100 is a low-cost USB high-voltage dedicated charging port
(HVDCP) interface IC for the Quick Charge 2.0 specification. It
incorporates all necessary functions to add Quick Charge 2.0
capability to Power Integrations’ integrated switcher ICs such as
TOPSwitch or TinySwitch.
CHY100 also supports other solutions with traditional feedback
schemes like optocoupler and secondary reference regulator
TL431 as depicted in Figure 5.
CHY100 supports the full output voltage range of Quick Charge
2.0 Class A (5 V, 9 V, or 12 V) or Class B (5 V, 9 V, 12 V, or 20 V).
It automatically detects either Quick Charge 2.0 capable powered
devices (PD) or legacy PDs compliant with the USB Battery
Charging Specification revision 1.2 and only enables output
voltage adjustment accordingly.
Shunt Regulator
The internal shunt regulator clamps the BYPASS pin at 6 V
when current is provided through an external resistor (R
BP
in
Figure 5). This facilitates powering of CHY100 externally over
the wide power supply output voltage range of 5 V to 20 V.
Recommended values are R
BP
= 4.53 kΩ and C
BP
= 220 nF.
BYPASS Pin Undervoltage
The BYPASS pin undervoltage circuitry resets the CHY100
when the BYPASS pin voltage drops below 3.9 V. Once the
BYPASS pin voltage drops below 3.9 V it must rise back to 4 V
to enable correct operation.
Reference Input
Resister R
REF
at the REFERENCE pin is connected to an internal
band gap reference and provides an accurate reference current
for internal timing circuits. The recommended value is R
REF
= 127 kΩ.
Quick Charge 2.0 Interface
At power-up CHY100 turns on switch N5 (see Figure 3) in 20 ms
or less after the BYPASS pin voltage has reached 4 V. Switch
N4 and output switches N1 to N3 remain off. This sets the
default 5 V output voltage level. With D
+
and D- short-circuited
the normal handshake between the AC-DC adapter (DCP) and
powered devices (PD) as described in the USB Battery Charging
Specification 1.2 can commence. After switch N5 has been
turned on CHY100 starts monitoring the voltage level at D
+
. If it
continuously stays above V
DAT(REF )
(typ. 0.325 V) and below
V
SEL(REF)
(typ. 2 V) for at least 1.25 seconds CHY100 will enter
Quick Charge 2.0 operation mode. If the voltage at D
+
drops
any time below 0.325 V CHY100 resets the 1.25 seconds timer
and stays in USB Battery Charging Specification 1.2 compatibility
mode with a default output voltage of 5 V.
Once CHY100 has entered Quick Charge 2.0 operation mode
switch N5 will be turned off. Additionally switch N4 is turned on
connecting a 19.53 kΩ pull-down resistor to D-. As soon as the
voltage at D- has dropped low (<0.325 V) for at least 1 ms
CHY100 starts accepting requests for different AC-DC adapter
output voltages by means of applied voltage levels at data lines
D
+
and D- through the powered device. Table 1 summarizes
the output voltage lookup table, corresponding AC-DC adapter
output voltages and status of switches N1 to N3.
For Quick Charge 2.0 Class A support only, the V3 pin has to be
connected to the BYPASS pin (directly or through a resistor up to
100 kΩ). This will inhibit any requests for setting a 20 V output.
At USB cable disconnect the voltage level at D+ is pulled down
by resistor R
DAT(LKG)
(see Figure 5). Once it drops below 0.325 V
CHY100 will turn on switch N5 (thereby short-circuiting D+ and
D-) and turns off switches N1 to N4. This sets the default output
voltage of 5 V. The recommended value for R
DAT(LKG)
= 390 kΩ.
Figure 5. CHY100 with Traditional Output Regulation (CV Only).
PI-7008-071613
BP
VOUT
D
+
D
-
GND
GND
D+
D-
R
V3
V2
V1
U3
R5
R4
R3
D1
C1 R1R6
R
BP
C
BP
R
DAT_LKG
C6
R2
U1
TL431
R
REF
CHY100
U2
D
+
D- Output Switch Status
0.6 V 0.6 V 12 V N1 = N2 = On, N3 = Off
3.3 V 0.6 V 9 V N1 = On, N2 = N3 = Off
3.3 V 3.3 V 20 V N1 = N2 = N3 = On
0.6 V GND 5 V (default) N1 = N2 = N3 = Off
Table 1. Output Voltage Lookup Table.
