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NCN6010DTB

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16
NCN6010
http://onsemi.com
10
Figure 7. SIM_IO Rise and Fall Time Oscillogram
Input Schmitt Triggers
All the Logic Input pins have built-in Schmitt trigger
circuits to prevent the NCN6010 against uncontrolled
operation. The typical dynamic characteristics of the related
pins are depicted in Figure 8.
The output signal is guaranteed to go High when the input
voltage is above 0.70*Vbat, and will go Low when the input
voltage is below 0.30 * Vbat.
Figure 8. Typical Schmitt Trigger Characteristic
Output
V
bat
ON
OFF
0.30 V
bat
0.70 V
bat
V
bat
Input
Charge Pump Converter
The converter uses a switched capacitor technique to
increase the SIM_VCC voltage up to 5.0 V from a 3.3 V
typical battery. The concept, depicted in Figure 9, charges
the transfer capacitor C1 up to the Vcc value, then connects
this capacitor is series with the input voltage–output
reservoir network. The voltage developed across the load is,
theoretically, twice the battery voltage, but the system must
takes into account the losses associated with the power
switches and the internal ohmic drops.
S1
S4
S5
C1
B
S3
S2
C2
V
CC
V
O
LOAD
I
S
A
Figure 9. Basic Charge Pump Converter
When the output voltage is programmed to 3.0 V, the
clocks are inactive and the load is directly connected to the
battery by means of switch S5. The SIM_VCC voltage
follows the input value, minus the drop coming from the
internal resistance . The current is limited by the Ron of the
power device S5 and t he output voltage will decrease as the
load current increases above 20 mA (typical). Figure 10
illustrates the theoretical waveforms.
NCN6010
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11
Figure 10. Basic Charge Pump Operating Timings
SIM_V
CC
= 5.0 V
S1
S2
S3
S4
S5
SIM_V
CC
= 3.0 V
MOD_V
CC
When the NCN6010 is programmed in the 5.0 V output
voltage, the clocks are activated, switch S5 is disconnected
and the output voltage is the result of the C1 charge transfer
into the output load. The current is limited by three mains
parameters:
- the Ron of the switching MOS (S1 through S4)
- the operating frequency
- the C1/C2 ratio and their ESR
The first parameters are depending upon the internal
structure and size of the NMOS/PMOS devices used to
design the chip. The third parameter is adjustable by the user
and, beside the micro farad values, the type of capacitors
plays a significant role. As a matter of fact, using a low cost
electrolytic model will ruin the efficiency due to the high
ESR of such a capacitor. It is highly recommended to use
ceramic types, preferably from the X5R or X7R series, to
achieve the efficiency and the SIM_VCC output voltage
ripple. Table 2 summarizes the characteristics of the most
common type of capacitors.
Table 2. Comparison of Capacitor Types
Manufacturers Type/Serie Format Max Value Tolerance Typ. Z @ 500 kHz
MURATA CERAMIC/GRM225 0805
10 mF/6.3 V
+80%/-20%
30 mW
VISHAY Tantalum/594C/593C 1206
10 mF/16 V
-
450 mW
VISHAY Electrolytic/94SV 1206
10 mF/10 V
-20%/+20%
400 mW
NCN6010
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12
It is clear that, with nearly half an ohm of resistance is
series with the pure capacitor, the tantalum or the electrolytic
type will generate high voltage spikes and poor regulation in
the high frequency operating charge pump built into the
NCN6010. Moreover, with ESR in the 3.0 Ohm range, low
cost capacitors are not suitable for this application.
Figure 11 provides the schematic diagram of the simulated
charge pump circuit. Although this schematic does not
represent the accurate internal structure of the NCN6010, it
can be used for engineering purpose. The ABM devices S1,
S2, S4 and S5 have been defined in the PSPICE model to
represent the NMOS and PMOS used in the silicon. The
ESR value of C2 and C3 can be adjusted, at PSPICE level,
to cope with any type of external capacitors and are useful
to double check the behavior of the system as a function of
the external passives components.
+
+
-
+
-
+
-
+
-
+
-
+
-
S1
U1A
74HC08
1
2
3
U3A
74HC14
12
U2A
74HC14
1 2
S2
V1
275 V
V2
V1 = 0
Transfer Capacitor
S4
E5
EVALUE
S5
Battery Pack
V3
5.0 V
-
+
+
-
TD = 10 ns
TR = 10 ns
TF = 10 ns
PW = 600 ns
PER = 1200 ns
+
-
+
-
+
-
OUT+ IN+
OUT- IN-
R1
0.1 R
C1
4.7 mF
IC = 0
S
V
OFF
= 0.0 V
V
ON
= 1.0 V
S
V
OFF
= 2.0 V
V
ON
= 0.0 V
R2
0.1 R
C2
1 mF
R4
0.05 R
C3
220 nF
S
V
ON
= 1.0 V
V
OFF
= 0.0 V
S
V
OFF
= 2.0 V
V
ON
= 0.0 V
R3
0.5 R
Figure 11. Charge Pump Simulation Schematic Diagram
if (V (%IN+, %IN-) > 80 mV, 5, 0)
R5
500 R
LOAD
V2 = 3
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P16

NCN6010DTB

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Manufacturer:
ON Semiconductor
Description:
Translation - Voltage Levels 2.7V Sim Card
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