OMO ElectronicOMO Electronic
Expand menu
Hello, Sign inMy Account
0 Cart

5V49EE701-075NDGI8

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P34
IDT5V49EE701
EEPROM PROGRAMMABLE CLOCK GENERATOR CLOCK SYNTHESIZER
IDT®
EEPROM PROGRAMMABLE CLOCK GENERATOR 31
IDT5V49EE701 REV P 071015
Marking Diagram
Notes:
1. “#” is the lot number.
2. YYWW is the last two digits of the year and week that the part was assembled.
3. “$” is the assembly mark code.
4. “I” indicates industrial temperature range.
Thermal Characteristics 28-pin QFN
Landing Pattern
4701DI
#YYWW$
Parameter Symbol Conditions Min. Typ. Max. Units
Thermal Resistance Junction to
Ambient
JA
Still air 47.0 C/W
JA
1 m/s air flow 41.8 C/W
JA
2.5 m/s air flow 39.2 C/W
Thermal Resistance Junction to Case
JC
52.9 C/W
X
D2
Y
AD
ZD
E2 AE ZE
GD
GE
X
D2
Y
AD
ZD
E2 AE ZE
GD
GE
0.25X(max)
0.76Yref
2.9G(min)
2.65A(max)
2.7E2/D2(max)
4.41Z(max)
Dimensions
0.25X(max)
0.76Yref
2.9G(min)
2.65A(max)
2.7E2/D2(max)
4.41Z(max)
Dimensions
Unit : mm
IDT5V49EE701
EEPROM PROGRAMMABLE CLOCK GENERATOR CLOCK SYNTHESIZER
IDT®
EEPROM PROGRAMMABLE CLOCK GENERATOR 32
IDT5V49EE701 REV P 071015
Package Outline and Package Dimensions (28-pin 4mm x 4mm QFN)
Package dimensions are kept current with JEDEC Publication No. 95
Ordering Information
“G” after the two-letter package code are the Pb-Free configuration and are RoHS compliant.
While the information presented herein has been checked for both accuracy and reliability, Integrated Device Technology (IDT) assumes
no responsibility for either its use or for the infringement of any patents or other rights of third parties, which would result from its use. No
other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications
such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not
recommended without additional processing by IDT. IDT reserves the right to change any circuitry or specifications without notice. IDT
does not authorize or warrant any IDT product for use in life support devices or critical medical instruments.
Millimeters
Symbol Min Max
A0.801.00
A1 0 0.05
A3 0.20 Reference
b0.150.25
e 0.40 BASIC
N28
N
D
7
N
E
7
D x E BASIC 4.00 x 4.00
D2 2.50 2.70
E2 2.50 2.70
L0.300.50
Part / Order Number Marking Shipping Packaging Package Temperature
5V49EE701NDGI See page 31 Tray 28-pin QFN -40 to +85 C
5V49EE701NDGI8 See page 31 Tape and Reel 28-pin QFN -40 to +85 C
Sawn
Singulation
1
2
N
E
D
Index Area
Top View
Seating Plane
A3
A1
C
A
L
E2
E2
2
D2
D2
2
e
C0.08
(Ref)
N
D
& N
E
Odd
(Ref)
N
D
& N
E
Even
(N
D
-1)x
(Ref)
e
N
1
2
b
Thermal Base
(Typ)
If N
D
& N
E
are Even
(N
E
-1)x
(Ref)
e
e
2
EP – exposed thermal pad
should be externally
connected to GND
IDT5V49EE701
EEPROM PROGRAMMABLE CLOCK GENERATOR CLOCK SYNTHESIZER
IDT®
EEPROM PROGRAMMABLE CLOCK GENERATOR 33
IDT5V49EE701 REV P 071015
Revision History
Rev. Date Originator Description of Change
A 4/27/09 R.Willner Advance Information.
B 5/04/09 R.Willner Identified VDDX (crystal oscillator power) and AVDD (analog power) on device.
C 6/04/09 R.Willner Add default configurations, pull-down resistor values on input pins.
Released Datasheet from Advanced Information.
D 06/10/09 R.Willner Updates: crystal load specs; “Output Duty Cycle” specs; addresses 0x07, 0x02 and 0xBF
in “Programming Registers” table.
E 10/05/09 R.Willner Changed IP3[3:0] to IP3[4:0]; updated “Programming Registers Table”.
F 12/07/09 R.Willner Updated VDD min/max specs in Recommended Operation Conidtions.
G 2/22/10 R.Willner Included AVDD and VDDx min/max specs in Recommended Operation Conditions.
H 01/19/11 R.Willner Corrected notes for top-side marking.
J 05/04/11 R.Willner Added Landing Pattern diagram.
K 04/17/12 R. Willner 1. Change description for SDAT and SCLK pins.
2. Add new footnotes to pin descriptions table
3. Added section "Crystal Clock Selection"
4. Added logic diagram and Truth table for "SD/OE Pin Function" section.
5. Corrected register readback values for 0x52~0x54 and 0x7C~0x7F.
6. Update to QFN package drawing - exposed thermal pad callout.
L 06/04/12 A. Tsui 1. Updated SD-OE pin description; from (Default is active HIGH) to (Default is active
LOW)
2. Updated “OUTn” column in Truth Table with “High-Z” specs and added footnote 2,
“High-Z regardless of OEM bits”.
3. Updated “SD-OE Pin Function” section to reflect that SP is “0”changed from active
HIGH to active LOW, and SP is “1” changed from active LOW to active HIGH.
M 06/18/12 R.Willner Added Min/Max spread values to "Spread Spectrum Generation Specifications" table;
fMOD - Max. 120kHz; Down Spread - Min. -0.5%, Max. -4.0%; Center Spread - Min.
±0.25%, Max. ±2.0%
N 09/24/12 R.Willner Change differential outputs from 5pF loads to 2pF loads so that they are consistent with
the industry. Capacitive loads were also added to the test circuit diagrams for HCSL
outputs. Slew Rate (t4) Output Load test conditions were also changed from 15pF to 5pF.
P 07/10/15 A.B. Added the following note under AC Timing Electrical Characteristics table:
“Not guaranteed until customer specific configuration is approved by IDT.”
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P34

5V49EE701-075NDGI8

Mfr. #:
Buy 5V49EE701-075NDGI8
Manufacturer:
IDT
Description:
Clock Generators & Support Products VERSACLOCK PROGRAMMABLE PLL
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet