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ADG1334BRSZ

P1-P3P4-P6P7-P9P10-P12P13-P13
ADG1334
Rev. 0 | Page 6 of 12
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
IN1
1
S1A
2
D1
3
S1B
4
IN4
20
S4A
19
D4
18
S4B
17
V
SS
5
GND
6
S2B
7
V
DD
16
NC
15
S3B
14
D2
8
D3
13
S2A
9
S3A
12
IN2
10
IN3
11
NC = NO CONNECT
ADG1334
TOP VIEW
(Not to Scale)
05744-002
Figure 2. 20-Lead SSOP Pin Configuration
Table 4. 20-Lead SSOP Pin Function Descriptions
Pin No. Mnemonic Description
1, 10, 11, 20 IN1, IN2, IN3, IN4 Logic Control Input.
2, 4, 7, 9, 12, 14, 17, 19 S1A, S1B, S2B, S2A, S3A, S3B, S4B, S4A Source Terminal. Can be an input or output.
3, 8, 13, 18 D1, D2, D3, D4 Drain Terminal. Can be an input or output.
5 V
SS
Most Negative Power Supply Potential in Dual Supplies. In
single-supply applications, it can be connected to ground.
6 GND Ground (0 V) Reference.
15 NC No Connect.
16 V
DD
Most Positive Power Supply Potential.
Table 5. ADG1334 Truth Table
Logic Switch A Switch B
0 Off On
1 On Off
ADG1334
Rev. 0 | Page 7 of 12
TERMINOLOGY
R
ON
Ohmic resistance between D and S.
ΔR
ON
Difference between the R
ON
of any two channels.
I
S
(Off)
Source leakage current when switch is off.
I
D
(Off)
Drain leakage current when switch is off.
I
D
, I
S
(On)
Channel leakage current when switch is on.
V
D
(V
S
)
Analog voltage on Terminal D, Terminal S.
C
S
(OFF)
Channel input capacitance for off condition.
C
D
(Off)
Channel output capacitance for off condition.
C
D
, C
S
(On)
On switch capacitance.
C
IN
Digital input capacitance.
t
ON
The delay between applying the digital control input and the
output switching on (see
Figure 14).
t
OFF
The delay between applying the digital control input and the
output switching off (see
Figure 14).
t
BBM
Off time measured between the 80% point of both switches
when switching from one address state to another.
V
INL
Maximum input voltage for Logic 0.
V
INH
Minimum input voltage for Logic 1.
I
INL
(I
INH
)
Input current of the digital input.
I
DD
Positive supply current.
I
SS
Negative supply current.
Off Isolation
A measure of unwanted signal coupling through an off channel.
Charge Injection
A measure of the glitch impulse transferred from the digital
input to the analog output during switching.
Bandwidth
Frequency at which the output is attenuated by 3 dB.
On Response
Frequency response of the on switch.
ADG1334
Rev. 0 | Page 8 of 12
TYPICAL PERFORMANCE CHARACTERISTICS
V
DD
= +15V
V
SS
= –15V
SOURCE OR DRAIN VOLTAGE (V)
ON RESISTANCE (Ω)
200
180
160
140
120
100
60
80
0
20
40
–15 –12 –9 –6 –3 3 90 6 12 15
05744-007
T
A
= 25°C
Figure 3. On Resistance as a Function of V
D
(V
S
) for Dual Supply
SOURCE OR DRAIN VOLTAGE (V)
ON RESISTANCE (Ω)
450
400
350
300
250
150
200
0
50
100
0246810
05744-008
12
V
DD
= 12V
V
SS
= 0V
T
A
= 25°C
Figure 4. On Resistance as a Function of V
D
(V
S
) for Single Supply
SOURCE OR DRAIN VOLTAGE (V)
ON RESISTANCE (Ω)
250
150
200
0
50
100
–15 –10 –5 0 5 10 15
05744-009
V
DD
= +15V
V
SS
= –15V
T
A
= +25°C
T
A
= +85°C
T
A
= –40°C
Figure 5. On Resistance as a Function of V
D
(V
S
) for Different
Temperatures, Dual Supply
SOURCE OR DRAIN VOLTAGE (V)
ON RESISTANCE (Ω)
600
400
500
300
200
0
100
0246810
05744-010
12
V
DD
= 12V
V
SS
= 0V
T
A
= +25°C
T
A
= +85°C
T
A
= –40°C
Figure 6. On Resistance as a Function of V
D
(V
S
) for Different
Temperatures, Single Supply
V
S
(V)
CHARGE INJECTION (pC)
6
4
2
0
–2
–4
–6
–15 –10 –5 0 15105
05744-011
V
DD
= +15V
V
SS
= –15V
V
DD
= +12V
V
SS
= 0V
V
DD
= +5V
V
SS
= –5V
T
A
= +25°C
Figure 7. Charge Injection vs. Source Voltage
TEMPERATURE (°C)
TIME (ns)
160
140
120
100
80
60
20
40
0
–40 –20 0 20 6040 80
05744-005
T
ON
T
OFF
V
DD
= +15V
V
SS
= –15V
Figure 8. T
ON
/T
OFF
Time vs. Temperature
P1-P3P4-P6P7-P9P10-P12P13-P13

ADG1334BRSZ

Mfr. #:
Buy ADG1334BRSZ
Manufacturer:
Analog Devices Inc.
Description:
Analog Switch ICs Quad SPDT +-15V/12V
Lifecycle:
New from this manufacturer.
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