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74LVTH273SJX

P1-P3P4-P6P7-P9
74LVTH273 — Low Voltage Octal D-Type Flip-Flop with Clear
©1999 Fairchild Semiconductor Corporation www.fairchildsemi.com
74LVTH273 Rev. 1.6.0
January 2008
74LVTH273
Low Voltage Octal D-Type Flip-Flop with Clear
Features
■
Input and output interface capability to systems at
5V V
CC
■
Bushold on the data inputs eliminate the need for
external pull-up resistors to hold unused inputs
■
Outputs source/sink –32mA/+64mA
■
Functionally compatible with the 74 series 273
■
Latch-up performance exceeds 500mA
■
ESD performance:
– Human-body model
>
2000V
– Machine model
>
200V
– Charged-device model
>
1000V
General Description
The LVTH273 is a high-speed, low-power positive-edge-
triggered octal D-type flip-flop featuring separate D-type
inputs for each flip-flop. A buffered Clock (CP) and Clear
(CLR
) are common to all flip-flops.
The state of each D-type input, one setup time before
the positive clock transition, is transferred to the corre-
sponding flip-flop's output.
The LVTH273 data inputs include bushold, eliminating
the need for external pull-up resistors to hold unused
inputs.
These octal flip-flops are designed for low-voltage (3.3V)
V
CC
applications, but with the capability to provide a TTL
interface to a 5V environment. The LVTH273 is fabri-
cated with an advanced BiCMOS technology to achieve
high speed operation similar to 5V ABT while maintain-
ing low power dissipation.
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
All packages are lead free per JEDEC: J-STD-020B standard.
Order Number
Package
Number Package Description
74LVTH273WM M20B 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
74LVTH273SJ M20D 20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74LVTH273MTC MTC20 20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
©1999 Fairchild Semiconductor Corporation www.fairchildsemi.com
74LVTH273 Rev. 1.6.0 2
74LVTH273 — Low Voltage Octal D-Type Flip-Flop with Clear
Connection Diagram
Pin Description
Functional Description
The LVTH273 consists of eight positive-edge-triggered
flip-flops with individual D-type inputs. The buffered
Clock and Clear are common to all flip-flops. The eight
flip-flops will store the state of their individual D-type
inputs that meet the setup and hold time requirements
on the LOW-to-HIGH Clock (CP) transition. When the
Clock is either HIGH or LOW, the D-input signal has no
effect at the output. When the Clear (CLR
) is LOW, all
Outputs will be forced LOW.
Logic Symbols
IEEE/IEC
Truth Table
H
=
HIGH Voltage Level
L
=
LOW Voltage Level
X
=
Immaterial
=
LOW-to-HIGH Transition
O
o
=
Previous O
o
before HIGH-to-LOW of CP
Logic Diagram
Please note that this diagram is provided only for the understanding of logic operations and should not be used to
estimate propagation delays.
Pin Names Description
D
0
–D
7
Data Inputs
CP Clock Pulse Input
CLR
Clear
O
0
–O
7
Outputs
Inputs Outputs
D
n
CP CLR O
n
HHH
LHL
XH or L H O
o
XXL L
©1999 Fairchild Semiconductor Corporation www.fairchildsemi.com
74LVTH273 Rev. 1.6.0 3
74LVTH273 — Low Voltage Octal D-Type Flip-Flop with Clear
Absolute Maximum Ratings
Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be
operable above the recommended operating conditions and stressing the parts to these levels is not recommended.
In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability.
The absolute maximum ratings are stress ratings only.
Note:
1. I
O
Absolute Maximum Rating must be observed.
Recommended Operating Conditions
The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended
operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not
recommend exceeding them or designing to absolute maximum ratings.
Symbol Parameter Rating
V
CC
Supply Voltage –0.5V to +4.6V
V
I
DC Input Voltage –0.5V to +7.0V
V
O
DC Output Voltage
,
Output in HIGH or LOW State
(1)
–0.5V to +7.0V
I
IK
DC Input Diode Current, V
I
<
GND –50mA
I
OK
DC Output Diode Current, V
O
<
GND –50mA
I
O
DC Output Current, V
O
>
V
CC
Output at HIGH State 64mA
Output at LOW State 128mA
I
CC
DC Supply Current per Supply Pin ±64mA
I
GND
DC Ground Current per Ground Pin ±128mA
T
STG
Storage Temperature –65°C to +150°C
Symbol Parameter Min Max Units
V
CC
Supply Voltage 2.7 3.6 V
V
I
Input Voltage 0 5.5 V
I
OH
HIGH-Level Output Current –32 mA
I
OL
LOW-Level Output Current 64 mA
T
A
Free-Air Operating Temperature –40 85 °C
∆
t
/
∆
V Input Edge Rate, V
IN
=
0.8V–2.0V, V
CC
=
3.0V 0 10 ns/V
P1-P3P4-P6P7-P9

74LVTH273SJX

Mfr. #:
Buy 74LVTH273SJX
Manufacturer:
ON Semiconductor / Fairchild
Description:
Flip Flops Oct D-Type Flip-Flop
Lifecycle:
New from this manufacturer.
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