74LVTH273SJX Datasheet 74LVTH273MTCX, 74LVTH273WMX, 74LVTH273SJ | P4-P6

74LVTH273 Rev. 1.6.0 4

74LVTH273 — Low Voltage Octal D-Type Flip-Flop with Clear

DC Electrical Characteristics

Notes:

2. All typical values are at V

CC

=

3.3V, T

A

=

25°C.

3. An external driver must source at least the specified current to switch from LOW-to-HIGH.

4. An external driver must sink at least the specified current to switch from HIGH-to-LOW.

5. This is the increase in supply current for each input that is at the specified voltage level rather than V

CC

or GND.

Symbol Parameter

V

CC

(V) Conditions

T

A

=

–40°C to +85°C

UnitsMin. Typ.

(2)

Max.

V

IK

Input Clamp Diode Voltage 2.7 I

I

=

–18mA –1.2 V

V

IH

Input HIGH Voltage 2.7–3.6 V

O

≤

0.1V or

V

O

≥

V

CC

– 0.1V

2.0 V

V

IL

Input LOW Voltage 2.7–3.6 0.8 V

V

OH

Output HIGH Voltage 2.7–3.6 I

OH

=

–100µA V

CC

– 0.2 V

2.7 I

OH

=

–8mA 2.4

3.0 I

OH

=

–32mA 2.0

V

OL

Output LOW Voltage 2.7 I

OL

=

100µA 0.2 V

I

OL

=

24mA 0.5

3.0 I

OL

=

16mA 0.4

I

OL

=

32mA 0.5

I

OL

=

64mA 0.55

I

I(HOLD)

Bushold Input Minimum Drive 3.0 V

I

=

0.8V 75 µA

V

I

=

2.0V –75

I

I(OD)

Bushold Input Over-Drive

Current to Change State

3.0

(3)

500 µA

(4)

–500

I

Input Current 3.6 V

I

=

5.5V 10 µA

Control Pins 3.6 V

I

=

0V or V

CC

±1

Data Pins 3.6 V

I

=

0V –5

V

I

= V

CC

1

I

OFF

Power Off Leakage Current 0 0V ≤ V

I

or V

O

≤ 5.5V ±100 µA

I

CCH

Power Supply Current 3.6 Outputs HIGH 0.19 mA

I

CCL

Power Supply Current 3.6 Outputs LOW 5 mA

∆I

CC

Increase in Power Supply

Current

(5)

3.6 One Input at V

CC

– 0.6V,

Other Inputs at V

CC

or

GND

0.2 mA

74LVTH273 Rev. 1.6.0 5

74LVTH273 — Low Voltage Octal D-Type Flip-Flop with Clear

Dynamic Switching Characteristics

(6)

Notes:

6. Characterized in SOIC package. Guaranteed parameter, but not tested.

7. Max number of outputs defined as (n). n–1 data inputs are driven 0V to 3V. Output under test held LOW.

AC Electrical Characteristics

Note:

8. All typical values are at V

CC

= 3.3V, T

A

= 25°C.

Capacitance

(9)

Note:

9. Capacitance is measured at frequency f = 1MHz, per MIL-STD-883B, Method 3012.

Symbol Parameter V

CC

(V)

Conditions T

A

= 25°C

UnitsC

L

= 50pF, R

L

= 500Ω Min. Typ. Ma.x

V

OLP

Quiet Output Maximum

Dynamic V

OL

3.3

(7)

0.8 V

V

OLV

Quiet Output Minimum

Dynamic V

OL

3.3

(7)

–0.8 V

Symbol Parameter

T

A

= –40°C to +85°C,

C

L

= 50pF, R

L

= 500Ω

Units

V

CC

= 3.3V ± 0.3V V

CC

= 2.7V

Min. Typ.

(8)

Max. Min. Max.

f

MAX

Maximum Clock Frequency 150 150 MHz

t

PLH

Propagation Delay. CP to O

n

1.7 4.9 1.7 5.5 ns

t

PHL

1.9 4.8 1.9 5.1

t

PHL

Propagation Delay CLR to O

n

1.6 4.8 1.6 5.4 ns

t

W

Pulse Duration 3.3 3.3 ns

t

S

Setup Time Data HIGH or LOW before CP 2.3 2.7 ns

CLR

HIGH before CP 2.3 2.7

t

H

Hold Time Data HIGH or LOW after CP 0 0 ns

Symbol Parameter Conditions Typical Units

C

IN

Input Capacitance V

CC

= 0V, V

I

= 0V or V

CC

3pF

C

OUT

Output Capacitance V

CC

= 3.0V, V

O

= 0V or V

CC

6pF

74LVTH273 Rev. 1.6.0 6

74LVTH273 — Low Voltage Octal D-Type Flip-Flop with Clear

Physical Dimensions

Figure 1. 20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide

Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner

without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or

obtain the most recent revision. Package speciﬁcations do not expand the terms of Fairchild’s worldwide terms and conditions,

speciﬁcally the warranty therein, which covers Fairchild products.

Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings:

http://www

.fairchildsemi.com/packaging/

0.10 C

C

A

SEE DETAIL A

NOTES: UNLESS OTHERWISE SPECIFIED

A) THIS PACKAGE CONFORMS TO JEDEC

MS-013, VARIATION AC, ISSUE E

B) ALL DIMENSIONS ARE IN MILLIMETERS.

C) DIMENSIONS DO NOT INCLUDE MOLD

FLASH OR BURRS.

E) LANDPATTERN STANDARD: SOIC127P1030X265-20L

PIN ONE

INDICATOR

0.25

1 10

BC A

M

20 11

B

X45°

8°

0°

SEATING PLANE

GAGE PLANE

DETAIL A

SCALE: 2:1

SEATING PLANE

LAND PATTERN RECOMMENDATION

F) DRAWING FILENAME: MKT-M20BREV3

0.65

1.27

2.25

9.50

13.00

12.60

11.43

7.60

7.40

10.65

10.00

0.51

0.35

1.27

2.65 MAX

0.30

0.10

0.33

0.20

0.75

0.25

(R0.10)

1.27

0.40

(1.40)

0.25

D) CONFORMS TO ASME Y14.5M-1994

74LVTH273SJX

74LVTH273SJX

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