Integrated
Circuit
Systems, Inc.
General Description Features
ICS2008B
ICS2008B Rev G 5/13/10
Block Diagram
SMPTE Time Code Receiver/Generator
Meets SMPTE VITC Specifications
Meets SMPTE and EBU LTC Specifications
Time Code Burn-in Window
– Programmable position, size and character attributes
LTC edge rate control
– Conforms to EBU T
r
and T
f
Specifications
Internal and external sync sources
Genlock to video or house sync inputs
Improved video timing lock during VCR pause and
shuttle modes
Internally generated timing from oscillator input
External click input
Internal Timer
Allows 1/4 Frame MIDI Time Code Messages
LTC and VITC Generators
Real Time SMPTE Rates:
30 Hz, 29.97 Hz, 25 Hz, 24 Hz
Time Code Modes
Drop Frame and Color Frame
VITC can be inserted on two lines from 10-40
(SMPTE specifies lines 10-20)
Jam Sync, freewheeling, error bypass/correction,
and plus-one-frame capability
LTC Receiver
Synchronize bit rates from 1/30
th
nominal to 80X
nominal playback speed.
VITC Receiver
Reads code from any or all selected scan lines.
VITC search mode, will search through VBI lines until
VITC is found.
New UART frequency of 38.4 K for tape transport control
The ICS2008B, SMPTE Time Code Receiver/Generator
chip, is a VLSI device designed in a low power CMOS
process. This device provides the timing coordination for
Multimedia sight and sound events. Although it is aimed at
a PC Multimedia environment, the ICS2008B is easily
integrated into products requiring SMPTE time code
generation and/or reception in LTC (Longitudinal Time
Code) and/or VITC (Vertical Interval Time Code) formats
and MTC (MIDI Time Code) translation.
Taking its input from composite video, S-Video, or an
audio track, the ICS2008B can read SMPTE time code in
VITC and LTC formats. Time code output formats are LTC
and VITC. All are available simultaneously. A UART is
provided for the user to support MTC or tape transport
control.
The processor interface is compatible with the IBM PC and
ISA bus compatible computers and is easily interfaced to
other processors and micro-controllers.
The ICS2008B is an improved version of the ICS2008,
with additional features and capabilities.
ICS2008 ICS2008B 2008 2008B
ICS reserves the right to make changes in the device data identified in this publication without
further notice. ICS advises its customers to obtain the latest version of all device data to verify
that any information being relied upon by the customer is current and accurate.
ICS2008B
2
ICS2008B
Package Pinouts
18
19
20 21 22 23 24 25 26 27 28
29
30
31
32
33
34
36
38
35
37
39
65432
1
40414243
44
D2
D1
D0
IOW*
VDD
VSS
IOR*
UARTCS*
SMPT ECS*
A1
A0
Y1
STHRESH
CTHRESH
DTHRESH
RXD
CTS*
TXD
RTS*
LRCLK
VITCGATE
VITCOUT
L TCOUT
LFC
XTAL2
XTAL1
AVDD
AVSS
COUT
YOUT
C2
Y2
C1
D4
L TCIN+
D3
L TCIN-
CLICK
FRAME
RESET
IN TR
D7
D6
D5
7
8
9
10
11
12
13
14
15
16
17
12
13
14 15 16 17 18 19 20 21 22
23
24
25
26
27
28
30
32
29
31
33
44 43 42 41 40 39 3435363738
D2
D1
D0
IOW*
VDD
VSS
IOR*
UARTCS*
SMPT ECS*
A1
A0
Y1
STHRESH
CTHRESH
DTHRESH
RXD
CTS*
TXD
RTS*
LRCLK
VITCGATE
VITCOUT
L TCOUT
LFC
XTAL2
XTAL1
AVDD
AVSS
COUT
YOUT
C2
Y2
C1
D4
L TCIN+
D3
L TCIN-
CLICK
FRAME
RESET
IN TR
D7
D6
D5
1
2
3
4
5
6
7
8
9
10
11
3
ICS2008B
ICS2008B
Pin Descriptions
TYPE:
A – Analog • P – Power • I – Input • O – Output 2008 2008B ICS2008
PIN NUMBER
PIN
NAME
TYPE DESCRIPTION
TQFP PLCC
12, 10 18, 16 Y1, Y2 AI
Video inputs from camera or other source. NOTE: This is also the Y
(Luma) input for S-VHS and HI-8 systems.
11, 9 17, 15 C1, C2 AI
C (Chroma) inputs for S-VHS and HI-8 systems. In NTSC systems, this
pin should be tied to its respective Y input.
15 21 DTHRESH AI Data Threshold bypass input.
13 19 STHRESH AI SYNC Threshold bypass input.
14 20 CTHRESH AI Clamp Threshold bypass input.
8 14 Y OUT AO Video output. This is also the Y (Luma) output in S-Video mode.
7 13 C OUT AO C (Chroma) output for S-VHS and HI-8 systems.
41 3 FRAME
AI
Color Frame A/B input. This input is self biased (See Applications).
42 4 CLICK AI LTC SYNC input. This input is self biased (See Applications).
44 6 LTCIN+ AI SMPTE LTC input+. This input is self biased (See Applications).
43 5 LTCIN– AI SMPTE LTC input–. This input is self biased (See Applications).
1 7 LTCOUT AO SMPTE LTC output
20 26 LRCLK O SMPTE LTC receive clock output.
22 28 VITCOUT O SMPTE VITC output to video mixer circuit.
21 27 VITCGATE O VITC gate indicates VITC code is being output for video overlay.
18 24 TxD O UART Transmit data
16 22 RxD I UART Receive data
17 23 CTS* I Clear to Send
19 25 RTS* O Ready to Send
4 10 XTAL1 I 14.318 MHz crystal input.
3 9 XTAL2 O 14.318 MHz crystal oscillator output.
2 8 LFC AI Tie to +5 VDC
24, 23 30, 29 A1-A0 I Address bus
27 33 IOR* I Read Enable (active low)
30 36 IOW* I Write Enable (active low)
25 31 SMPTECS* I SMPTE port chip select (active low)
26 32 UARTCS* I UART chip select (active low)
40 2 RESET I Master reset (active high)
38–31 44–37 D7-D0 I/O Bi-directional data bus
39 1 INTR O Interrupt Request (active high)
5 11 AVDD P Analog V
DD
6 12 AVSS P Analog Ground
29 35 VDD P Digital V
DD
28 34 VSS P Digital

ICS2008BY-10LFT

Mfr. #:
Manufacturer:
Description:
IC TIME CODE RCVR/GEN 44-TQFP
Lifecycle:
New from this manufacturer.
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