LT1158
7
1158fb
BLOCK DIAGRAM
+
+
V
+
V
+
1
V
+
LOGIC
INPUT
+
2
BIAS
GEN
4
3
2.7V
1.2V
7.5V
5
6
7
GND
INPUT
1.4V
S
R
Q
Q
7.5V
16
CHG
PUMP
+
T
14
13
12
11
10
110mV
9
+
8
B GATE FB
B
1.5V
15V
B GATE DR
+
R
1-SHOT
1-SHOT
R
O
2.6V
S
1.75V
BOOST
T GATE DR
T GATE FB
T SOURCE
SENSE
+
SENSE
FAULT
ENABLE
BIAS
BOOST DR
V
+
1158 FD
25μA
V
+
15V
15
LT1158
8
1158fb
OPERATION
TEST CIRCUIT
0.01μF
LT1158 TC01
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
BOOST
T GATE DR
T GATE FB
T SOURCE
SENSE
+
SENSE
V
+
B GATE DR
BOOST DR
V
+
BIAS
ENABLE
FAULT
INPUT
GND
B GATE FB
+
V
+
+
3000pF
1μF
+
V16
+
V11
+
V12
3000pF
+
V8
V6
50Ω
+
V4
3k
1/2W
150Ω
2W
V14 – V13
LT1158
VN2222LL
100Ω
10μF
CLOSED
LOOP
2k
1/2W
+
+
Whenever there is an input transition on pin 6, the LT1158
follows a logical sequence to turn off one MOSFET and turn
on the other. First, turn-off is initiated, then V
GS
is moni-
tored until it has decreased below the turn-off threshold,
and fi nally the other gate is turned on. An input latch gets
reset by every low state at pin 6, but can only be set if the
top source pin has gone low, indicating that there will be
suffi cient charge in the bootstrap capacitor to safely turn
on the top MOSFET.
In order to conserve power, the gate drivers only provide
turn-on current for up to 2μs, set by internal one-shot
circuits. Each LT1158 driver can deliver 500mA for 2μs,
or 1000nC of gate charge––more than enough to turn on
multiple MOSFETs in parallel. Once turned on, each gate
is held high by a DC gate sustaining current: the bottom
gate by a 100μA current source, and the top gate by an
on-chip charge pump running at approximately 500kHz.
The fl oating supply for the top side driver is provided by
a bootstrap capacitor between the boost pin 16 and top
source pin 13. This capacitor is recharged each time pin 13
The LT1158 self-enables via an internal 25μA pull-up on
the enable pin 4. When pin 4 is pulled down, much of the
input logic is disabled, reducing supply current to 2mA.
With pin 4 low, the input state is ignored and both MOSFET
gates are actively held low. With pin 4 enabled, one or the
other of the 2 MOSFETs is turned on, depending on the
state of the input pin 6: high for top side on, and low for
bottom side on. The 1.4V input threshold is regulated and
has 200mV of hysteresis.
In order to allow operation over 5V to 30V nominal supply
voltages, an internal bias generator is employed to furnish
constant bias voltages and currents. The bias generator is
decoupled at pin 3 to eliminate any effects from switching
transients. No DC loading is allowed on pin 3.
The top and bottom gate drivers in the LT1158 each utilize
two gate connections: 1) A gate drive pin, which provides
the turn-on and turn-off currents through an optional series
gate resistor; and 2) A gate feedback pin which connects
directly to the gate to monitor the gate-to-source voltage
and supply the DC gate sustaining current.
(Refer to Functional Diagram)
LT1158
9
1158fb
Power MOSFET Selection
Since the LT1158 inherently protects the top and bottom
MOSFETs from simultaneous conduction, there are no size
or matching constraints. Therefore selection can be made
based on the operating voltage and R
DS(ON)
requirements.
The MOSFET BV
DSS
should be at least 2 • V
SUPPLY
, and
should be increased to 3 • V
SUPPLY
in harsh environments
with frequent fault conditions. For the LT1158 maximum
operating supply of 30V, the MOSFET BV
DSS
should be
from 60V to 100V.
The MOSFET R
DS(ON)
is specifi ed at T
J
= 25°C and is gener-
ally chosen based on the operating effi ciency required as
long as the maximum MOSFET junction temperature is not
exceeded. The dissipation in each MOSFET is given by:
P=D I R
DS
DS ON
()
+
()
()
2
1
where D is the duty cycle and ∂ is the increase in R
DS(ON)
at the anticipated MOSFET junction temperature. From this
equation the required R
DS(ON)
can be derived:
R
P
DI
DS ON
DS
()
=
()
+
()
2
1
For example, if the MOSFET loss is to be limited to 2W
when operating at 5A and a 90% duty cycle, the required
R
DS(ON)
would be 0.089Ω/(1 + ∂). (1 + ∂) is given for
each MOSFET in the form of a normalized R
DS(ON)
vs
temperature curve, but ∂ = 0.007/°C can be used as an
approximation for low voltage MOSFETs. Thus if T
A
= 85°C
APPLICATIONS INFORMATION
and the available heat sinking has a thermal resistance of
20°C/W, the MOSFET junction temperature will be 125°C,
and ∂ = 0.007(125 – 25) = 0.7. This means that the required
R
DS(ON)
of the MOSFET will be 0.089Ω/1.7 = 0.0523Ω,
which can be satisfi ed by an IRFZ34.
Note that these calculations are for the continuous operating
condition; power MOSFETs can sustain far higher dissipa-
tions during transients. Additional R
DS(ON)
) constraints are
discussed under Starting High In-Rush Current Loads.
goes low in PWM operation, and is maintained by the charge
pump when the top MOSFET is on DC. A regulated boost
driver at pin 1 employs a source-referenced 15V clamp
that prevents the bootstrap capacitor from overcharging
regardless of V
+
or output transients.
The LT1158 provides a current-sense comparator and fault
output circuit for protection of the top power MOSFET. The
comparator input pins 11 and 12 are normally connected
across a shunt in the source of the top power MOSFET
(or to a current-sensing MOSFET). When pin 11 is more
than 1.2V below V
+
and V12 – V11 exceeds the 110mV
offset, FAULT pin 5 begins to sink current. During a short
circuit, the feedback loop regulates V12 – V11 to 150mV,
thereby limiting the top MOSFET current.
OPERATION
(Refer to Functional Diagram)
Figure 1. Paralleling MOSFETs
Paralleling MOSFETs
MOSFETs can be paralleled. The MOSFETs will inherently
share the currents according to their R
DS(ON)
ratio. The
LT1158 top and bottom drivers can each drive four power
MOSFETs in parallel with only a small loss in switching
speeds (see Typical Performance Characteristics). Indi-
vidual gate resistors may be required to “decouple” each
MOSFET from its neighbors to prevent high frequency
oscillations—consult manufacturers recommendations.
LT1158
R
G
R
G
R
G
: OPTIONAL 10Ω
1158 F01
GATE DR
GATE FB

LT1158ISW#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Gate Drivers Half Bridge N-Ch Pwr MOSFET Drvr
Lifecycle:
New from this manufacturer.
Delivery:
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