ADG790
Rev. A | Page 13 of 20
THEORY OF OPERATION
The ADG790 is a single-chip, CMOS switching solution that
comprises four SPDT switches and two 4:1 multiplexers. The
internal architecture used by the device groups the switches into
two sections, each optimized to provide the best performance in
terms of bandwidth and distortion. The on-chip parallel
interface controls the operation of all switches, allowing the
user to control switches from both sections simultaneously.
WIDE BANDWIDTH SECTION
The wide bandwidth section contains three SPDT switch
configurations S1A and S1B to D1, S2A and S2B to D2, and
S3A and S3B to D3. Besides low on resistance and excellent
flatness, these switches use a CMOS topology, which ensures
the ability to switch signals up to the supply rails. Combined
with the low switch capacitance, this provides the wide band-
width required when switching high frequency signals. The
three SPDT switches are also optimized to provide low prop-
agation delay and excellent matching between the channels,
making the ADG790 ideal for applications that use multiple
signals, such as universal USB switches (full speed and high
speed), or RGB video signals, such as VGA.
LOW DISTORTION SECTION
The low distortion section contains a single SPDT switch (S4A
and S4B to D4) and two 4:1 multiplexers (S5A, S5B, S5C, and
S5D to D5 and S6A, S6B, S6C, S6D and D6, respectively). The
switches from this section also use a CMOS topology that
exhibits very low on resistance and flatness while maintaining a
wide bandwidth that makes them suitable for a wide range of
applications, including low distortion audio and standard defi-
nition video signals. The channels from the 4:1 multiplexers
are matched to provide optimal performance when used with
differential signals such as S-Video.
CONTROL INTERFACE
The operation of the ADG790 is controlled via a 4-wire parallel
interface. The logic levels applied to the IN1, IN2, and IN3 pins
control the operation of the switches from both the wide band-
width and low distortion sections, as shown in Table 4. The
shutdown pin (S/D) allows the user to disable all four SPDT
switches and force the 4:1 multiplexers into the S5B and S6B
positions, respectively. This function can be used to set up a low
speed communication protocol between the circuitry from both
sides of the device, which allows automatic configuration of the
switching function.
For example, in modern handset applications, where a single
connector is used as a multifunction communication port, the
S5B to D5 and S6B to D6 configuration obtained by setting the
S/D pin high can be used to detect the type of peripheral device
connected to the handset. The ADG790 then automatically routes
the required signals to the communication port connector.
Table 4. Truth Table
Logic Control Inputs Switch Status
S/D IN1 IN2 IN3
S1A to D1
S2A to D2
S3A to D3
S5D to D5
S6D to D6
S1B to D1
S2B to D2
S3B to D3 S4A to D4 S4B to D4
S5A to D5
S6A to D6
S5B to D5
S6B to D6
S5C to D5
S6C to D6
1 X
1
X
1
X
1
Off Off Off Off Off On Off
0 0 0 0 Off On Off On Off Off On
0 0 0 1 On Off On Off Off Off Off
0 0 1 0 Off On On Off Off On Off
0 0 1 1 Off On On Off Off Off On
0 1 0 0 Off On On Off On Off Off
0 1 0 1 On Off Off On Off Off Off
0 1 1 0 Off On Off On On Off Off
0 1 1 1 Off On Off On Off On Off
1
X = logic state does not matter.
