ADG790
Rev. A | Page 3 of 20
SPECIFICATIONS
V
DD
= 2.7 V to 3.6 V, GND = 0 V, T
A
= −40°C to +85°C, all switch sections unless otherwise noted.
Table 1.
Parameter Symbol Test Conditions/Comments Min Typ
1
Max Unit
ANALOG SWITCH
Analog Signal Range 0 V
DD
V
On Resistance R
ON
V
DD
= 2.7 V, V
S
= 0 V to V
DD
, I
DS
= 10 mA (see Figure 18)
Wide bandwidth section
2
5.9 8.8 Ω
Low distortion section
3
3.9 5.5 Ω
On Resistance Flatness R
FLAT(ON)
V
DD
= 2.7 V, V
S
= 0 V to V
DD
, I
DS
= 10 mA (see Figure 18)
Wide bandwidth section
2
2.0 3.6 Ω
Low distortion section
3
0.74 1.6 Ω
On Resistance Matching
Between Channels
4
∆R
ON
V
DD
= 2.7 V, V
S
= 0 V to V
DD
, I
DS
= 10 mA
Wide bandwidth section
2
0.52 Ω
Low distortion section
3
(SPDT) 0.1 Ω
Low distortion section
3
(4:1 multiplexers) 0.3 Ω
LEAKAGE CURRENTS
Source Off Leakage I
S
(Off)
V
DD
= 3.6 V, V
S
= 0 V or 3.6 V, V
D
= 3.6 V or 0 V
(see Figure 19)
±10 nA
Channel On Leakage I
D
, I
S
(On) V
DD
= 3.6 V, V
S
= V
D
= 0 V or 3.6 V (see Figure 20) ±10 nA
DIGITAL INPUTS (IN1, IN2, IN3, S/D)
Input High Voltage V
INH
2.0 V
Input Low Voltage V
INL
0.8 V
Input High/Input Low Current
5
I
INL
, I
INH
V
IN
= V
INL
or V
INH
±0.005 ±0.1 μA
Digital Input Capacitance C
IN
6 pF
DYNAMIC CHARACTERISTICS
5
t
ON
t
ON
R
L
= 50 Ω, C
L
= 35 pF, V
S
= V
DD
/2 or 0 V (see Figure 24) 20 32 ns
t
OFF
t
OFF
R
L
= 50 Ω, C
L
= 35 pF, V
S
= V
DD
/2 or 0 V (see Figure 24) 9 15 ns
Propagation Delay t
D
R
L
= 50 Ω, C
L
= 35 pF
Wide bandwidth section
2
0.3 0.46 ns
Low distortion section
3
(SPDT) 0.65 0.95 ns
Low distortion section
3
(4:1 multiplexers) 0.4 0.65 ns
Propagation Delay Skew t
SKEW
R
L
= 50 Ω, C
L
= 35 pF
Wide bandwidth section
2
20 ps
Low distortion section
3
(4:1 multiplexers) 40 ps
Break-Before-Make Time Delay t
BBM
R
L
= 50 Ω, C
L
= 35 pF, V
S1
= V
S2
= V
DD
/2 (see Figure 25) 5 11 ns
Charge Injection Q
INJ
V
S
= 0 V, R
S
= 0 Ω, C
L
= 1 nF (see Figure 26)
Wide bandwidth section
2
−0.57 pC
Low distortion section
3
6.2 pC
Off Isolation R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz (see Figure 21) −74 dB
Channel-to-Channel Crosstalk R
L
= 50 Ω, C
L
= 5 pF, f = 1 MHz (see Figure 22) –77 dB
Total Harmonic Distortion THD + N R
L
= 32 Ω, f = 20 Hz to 20 kHz, V
S
= 2 V p-p
Wide bandwidth section
2
1.2 %
Low distortion section
3
0.65 %
−3 dB Bandwidth R
L
= 50 Ω, C
L
= 5 pF (see Figure 23)
Wide bandwidth section
2
550 MHz
Low distortion section
3
(SPDT) 230 MHz
Low distortion section
3
(4:1 multiplexers) 160 MHz
Differential Gain Error CCIR330 test signal
Wide bandwidth section
2
0.07 %
Low distortion section
3
(SPDT) 0.08 %
Low distortion section
3
(4:1 multiplexers) 0.18 %
ADG790
Rev. A | Page 4 of 20
Parameter Symbol Test Conditions/Comments Min Typ
1
Max Unit
Differential Phase Error CCIR330 test signal
Wide bandwidth section
2
0.13 Degrees
Low distortion section
3
(SPDT) 0.08 Degrees
Low distortion section
3
(4:1 multiplexers) 0.19 Degrees
Power Supply Rejection Ratio PSRR f = 10 kHz, no decoupling capacitors −90 dB
Source Off Capacitance C
S
(Off) Wide bandwidth section
2
3.5 pF
Low distortion section
3
11 pF
Drain Off Capacitance C
D
(Off) Wide bandwidth section
2
5.5 pF
Low distortion section
3
(SPDT) 14 pF
Source/Drain On Capacitance C
D
, C
S
(On) Wide bandwidth section
2
8.5 pF
Low distortion section
3
(SPDT) 19 pF
Low distortion section
3
(4:1 multiplexers) 32 pF
POWER REQUIREMENTS
Supply Voltage V
DD
1.65 3.6 V
Supply Current I
DD
V
DD
= 3.6 V, digital inputs tied to 0 V or 3.6 V 0.1 1.5 μA
1
All typical values are at T
A
= 25°C, V
DD
= 3.3 V.
2
Refers to all switches connected to Pin D1, Pin D2, and Pin D3.
3
Refers to all switches connected to Pin D4 (SPDT), Pin D5, and Pin D6 (4:1 multiplexers).
4
Refers to the on resistance matching between the same channels (SxA and SxB, for example) from different multiplexers for the wide bandwidth section and the 4:1
multiplexers from the low distortion section. For the SPDT switch from the low distortion section, it refers to the matching between the S4A and S4B channels.
5
Guaranteed by design; not subject to production test.
ADG790
Rev. A | Page 5 of 20
ABSOLUTE MAXIMUM RATINGS
T
A
= 25°C, unless otherwise noted.
Table 2.
Parameter Rating
V
DD
to GND −0.3 V to +4.6 V
Analog and Digital Pins
1
−0.3 V to V
DD
+ 0.3 V or
10 mA, whichever occurs first
Peak Current, S Pin or D Pin
100 mA (pulsed at 1 ms, 10%
duty cycle maximum)
Continuous Current,
S Pin or D Pin
30 mA
Operating Temperature Range −40°C to +85°C
Storage Temperature Range −65°C to +125°C
Junction Temperature 150°C
Thermal Impedance (θ
JA
)
2
80°C/W
Reflow Soldering (Pb Free)
Peak Temperature 260°C (+0°C/−5°C)
Time at Peak Temperature As per JEDEC J-STD-20
1
Overvoltages at INx, S pin or D pin are clamped by internal diodes. Limit
current to the maximum ratings given.
2
Measured with the device soldered on a 4-layer board.
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Only one absolute maximum rating can be applied at any one time.
ESD CAUTION

ADG790BCBZ-REEL

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Switch ICs - Various Low VTG CMOS Multimedia
Lifecycle:
New from this manufacturer.
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