HMC5883
www.honeywell.com 7
PERFORMANCE
The following graphs highlight HMC5883’s performance.
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14
12
10
8
6
4
2
Gain Setting
Resolution (mGa)
2.5
3.0
3.5
A VDD
Scatterplot of Resolution (mGa) vs Gain Setting
HMC5883 Current
0.01
0.1
1
10
0.1 1 10 100
Data Output Rate (Hz)
Typical Current (mA)
Single Measurement Mode
Single Measurement Mode, Single Supply
Continuous Mode
100806040200-20-40
1200
1100
1000
900
800
Temperature (deg C)
Sensitivity (cnt/Ga)
Typical Sensitivity (cnt/Ga) vs Temperature, Gain 1
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-0.5
-1.0
-1.5
-2.0
-2.5
-3.0
-3.5
-4.0
-4.5
Gain Setting
Temp Sens Coeff (cnt/Ga/°C)
-0.705421
-0.96381
-1.18476
-1.35212
-1.99756
-2.53693
-3.38048
-4.29695
Interval Plot of Temp Sens Coeff (cnt/Ga/°C)
Typical Measurement Period in Single-Measurement Mode
HMC5883
8 www.honeywell.com
BASIC DEVICE OPERATION
Anisotropic Magneto-Resistive Sensors
The Honeywell HMC5883 magnetoresistive sensor circuit is a trio of sensors and application specific support circuits to
measure magnetic fields. With power supply applied, the sensor converts any incident magnetic field in the sensitive axis
directions to a differential voltage output. The magnetoresistive sensors are made of a nickel-iron (Permalloy) thin-film and
patterned as a resistive strip element. In the presence of a magnetic field, a change in the bridge resistive elements
causes a corresponding change in voltage across the bridge outputs.
These resistive elements are aligned together to have a common sensitive axis (indicated by arrows on the pinouts) that
will provide positive voltage change with magnetic fields increasing in the sensitive direction. Because the output only is in
proportion to the one-dimensional axis (the principle of anisotropy) and its magnitude, additional sensor bridges placed at
orthogonal directions permit accurate measurement of arbitrary field direction.
Self Test
To check the HMC5883 for proper operation, a self test feature in incorporated in which the sensor is internally excited
with a nominal magnetic field (in either positive or negative bias configuration). This field is then measured and reported.
See SELF TEST OPERATION section below.
Power Management
This device is capable of operating with a single supply (AVDD) or dual supplies (AVDD and DVDD). Pin VREN makes
this selection by enabling the internal digital supply voltage regulator. When VREN is tied to AVDD, the device is in single
supply operation; this device is powered from AVDD; and the internal voltage regulator is enabled. When VREN is tied
to AGND this devices operates with both AVDD and DVDD as supplies. The table below shows the modes available at
the various power supply conditions.
Table 2: Operational Modes and Supply States
Voltage Regulator
This ASIC has an internal voltage regulator which, depending on the application needs, may be used instead of supplying
voltage to pin DVDD. If DVDD pin is used, the internal voltage regulator is not engaged. When both supplies are used,
DVDD is typically high before AVDD, but no latch-up conditions will exist if DVDD is brought high after AVDD.
DVDD
AVDD
Pin
VREN
Modes
Supported
Description
High
High
AGND
All
Internal voltage regulator: Disabled.
Digital I/O pins: Range from DGND to DVDD.
Device fully functional. Digital logic blocks are
powered from DVDD supply, including all on-
board clocks.
High
Low
AGND
Idle, Sleep
Internal voltage regulator: Disabled.
Digital I/O pins: Range from DGND to DVDD.
Device Measurement functionality not supported.
Device I
2
C bus and register access supported.
Internally
regulated
High
AVDD
All
Internal voltage regulator: Enabled
Digital I/O pins: Range from AGND to AVDD
Device fully functional. Digital logic blocks are
powered through on-board regulator.
HMC5883
www.honeywell.com 9
Power on Reset
Power on reset (POR) circuit shall return the device to the power-on default state. All registers shall be returned to their
default values. Circuitry shall return to it default state, such as, but not limited to: MUX channel, ADC state machine, and
bias current.
I
2
C Interface
Control of this device is carried out via the I
2
C bus. This device will be connected to this bus as a slave device under the
control of a master device, such as the processor.
This device shall be compliant with I
2
C-Bus Specification, document number: 9398 393 40011. As an I
2
C compatible
device, this device has a 7-bit serial address and supports I
2
C protocols. This device shall support standard and fast
modes, 100kHz and 400kHz respectively, but cannot support the high speed mode (Hs). External pull-up resistors are
required to support these standard and fast speed modes. Depending on the application, the internal pull-ups may be
used to support slower data speeds than specified by I
2
C standards. This device does not contain 50nsec spike
suppression as required by fast mode operation in the I
2
C-Bus Specification, “Table 4 Characteristics of the SDA and
SCL I/O stages for F/S-mode I
2
C-bus devices”.
Activities required by the master (register read and write) have priority over internal activities, such as the measurement.
The purpose of this priority is to not keep the master waiting and the I
2
C bus engaged for longer than necessary.
I
2
C Pull-up Resistors
Pull-up resistors are placed on the two I
2
C bus lines. Typically these resistors are off-chip, but, to conserve board space
in specific low clock speed applications, they are internal to this device.
Internal Clock
The device has an internal clock for internal digital logic functions and timing management.
H-Bridge for Set/Reset Strap Drive
The ASIC contains large switching FETs capable of delivering a large but brief pulse to the Set / Reset strap of the
sensor. This strap is largely a resistive load.
Charge Current Limit
The current that reservoir capacitor (C1) can draw when charging is limited. When using dual supplies this device shall
limit the current drawn from DVDD source to charge this capacitor. When only a single supply is used, Pin DVDD is
externally tied to pin C1. In this configuration, current is still limited. For example, the internal voltage regulator will limit
this current draw.
Bias Current Generator
The bias current generator is used to apply a bias current to the offset strap of the magneto-resistive sensor, which
creates an artificial magnetic field bias on the sensor. This function is enabled and the polarity is set by bits MS[n] in the
configuration register. The bias current generator generates dc current (about 5.5mA) supplied from the AVDD supply.

103040000

Mfr. #:
Manufacturer:
Seeed Studio
Description:
Magnetic Sensor Development Tools Xadow - Compass
Lifecycle:
New from this manufacturer.
Delivery:
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