ADP5073CP-EVALZ/ADP5074CP-EVALZ User Guide UG-1157
Rev. 0 | Page 5 of 8
LINE REGULATION
For line regulation measurements, monitor the regulator output
while its input is varied. For good line regulation, the output
should change very little with varying input levels. It is possible
to repeat this measurement under different load conditions.
Figure 4 and Figure 5 show the typical line regulation performance
of the ADP5073.
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0
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VARIATION IN OUTPUT VOLTAGE
FROM NOMINAL (%)
INPUT VOLTAGE (V)
I
OUT
= 440mA
I
OUT
= 250mA
I
OUT
= 100mA
I
OUT
= 0mA
F
igure 4. ADP5073 Line Regulation, V
NEG
= −5 V, f
SW
= 1.2 MHz, T
A
= 25°C
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0.50
3.00 3.50 4.00 4.50 5.00 5.50
VARIATION IN OUTPUT VOLTAGE
FROM NOMINAL (%)
INPUT VOLTAGE (V)
I
OUT
= 440mA
I
OUT
= 250mA
I
OUT
= 100mA
I
OUT
= 0mA
F
igure 5. ADP5073 Line Regulation, V
NEG
= −5 V, f
SW
= 2.4 MHz, T
A
= 25°C
LOAD REGULATION
For load regulation measurements, monitor the regulator output
while the load is varied. For good load regulation, the output
should change very little with varying loads. The input voltage must
be held constant during this measurement. Figure 6 shows the
typical load regulation performance of the ADP5073.
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0 0.05 0.10 0.15 0.20 0.25 0.30 0.35 0.40 0.45 0.50
VARIATION IN OUTPUT VOLTAGE
FROM NOMINAL (%)
LOAD CURRENT (A)
V
IN
= 5.5V, 1.2MHz
V
IN
= 3.0V, 1.2MHz
V
IN
= 5.5V, 2.4MHz
V
IN
= 3.0V, 2.4MHz
F
igure 6. ADP5073 Load Regulation, V
NEG
= −5 V, T
A
= 25°C
EFFICIENCY
For efficiency measurements, monitor the regulator input and
output while the load is varied. The input voltage must be held
constant during this measurement. Connect ammeters in series
with the input and output. Connect voltmeters to the PCB side of
the ammeter and measure the voltage across the input and output
terminals. For the best results, measure the voltage across the
input and output capacitors. If possible, particularly at low current,
trigger the meters simultaneously and set to average readings for a
period of a few hundred milliseconds or more. Averaging the
readings removes the switching ripple and skip mode effects.
Figure 7 shows the typical efficiency curves of ADP5073. Note
that, to remove the impact to the efficiency of the divider
resistors for the EN voltage, remove the V_EN jumper and the
EN jumper and provide an enable signal to the EN pin from an
external supply.
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30
40
50
60
70
80
90
0.001 0.01 0.1 1
EFFICIENCY (%)
LOAD CURRENT (A)
V
IN
= 3V,
f
SW
= 1.2MHz
V
IN
= 3V,
f
SW
= 2.4MHz
V
IN
= 5.5V,
f
SW
= 1.2MHz
V
IN
= 5.5V,
f
SW
= 2.4MHz
F
igure 7. ADP5073 Efficiency vs. Load Current, V
NEG
= −5 V, T
A
= 25°C
