1
®
FN8097.3
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
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X1205
2-Wire™ RTC Real Time Clock/Calendar
FEATURES
• Real Time Clock/Calendar
—Tracks time in Hours, Minutes, and Seconds
—Day of the Week, Day, Month, and Year
• 2 Polled Alarms (Non-volatile)
—Settable on the Second, Minute, Hour, Day of
the Week, Day, or Month
—Repeat Mode (periodic interrupts)
• Oscillator Compensation on Chip
—Internal Feedback Resistor and Compensation
Capacitors
—64 Position Digitally Controlled Trim Capacitor
—6 Digital Frequency Adjustment Settings to
±30ppm
• Battery Switch or Super Cap Input
• 2-Wire™ Interface Interoperable with I
2
C*
—400kHz Data Transfer Rate
• Low Power CMOS
—1.25µA Operating Current (Typical)
• Small Package Options
—8 Ld SOIC and 8 Ld TSSOP
• Repetitive Alarms
• Temperature Compensation
• Pb-Free Plus Anneal Available (RoHS Compliant)
APPLICATIONS
• Utility Meters
• HVAC Equipment
• Audio/Video Components
• Set Top Box/Television
•Modems
• Network Routers, Hubs, Switches, Bridges
• Cellular Infrastructure Equipment
• Fixed Broadband Wireless Equipment
• Pagers/PDA
• POS Equipment
• Test Meters/Fixtures
• Office Automation (Copiers, Fax)
• Home Appliances
• Computer Products
• Other Industrial/Medical/Automotive
DESCRIPTION
The X1205 device is a Real Time Clock with
clock/calendar, two polled alarms, oscillator
compensation, and battery backup switch.
The oscillator uses an external, low-cost 32.768kHz
crystal. All compensation and trim components are
integrated on the chip. This eliminates several external
discrete components and a trim capacitor, saving
board area and component cost.
The Real-Time Clock keeps track of time with
separate registers for Hours, Minutes, and Seconds.
The Calendar has separate registers for Date, Month,
Year and Day-of-week. The calendar is correct
through 2099, with automatic leap year correction.
BLOCK DIAGRAM
X1
X2
Oscillator
Frequency
Timer
Logic
Divider
Calendar
8
32.768kHz
Control
Registers
1Hz
Time
Keeping
Registers
Alarm Regs
Compare
Mask
IRQ
Control
Decode
Logic
Alarm
(EEPROM)
(EEPROM)
SCL
SDA
Serial
Interface
Decoder
Interrupt Enable
Registers
Status
(SRAM)
Alarm
Alarm
(SRAM)
OSC
Compensation
Data Sheet May 2, 2006