BD6761FS,BD6762FV
Technical Note
15/22
www.rohm.com
2010.06 - Rev.
© 2010 ROHM Co., Ltd. All rights reserved.
●IC Operation
1) Hall input and output
For the hall input signal, the wave is shaped by the hall amplifier to generate the drive signal.
This drive signal is amplified in the predriver block and the gate voltage is output for N-channel MOS FET.
2) PWM operation
PWM oscillating frequency is determined by the triangular waveform frequency which is decided by the external constant.
This triangular waveform voltage and the listed voltage in the following chart are compared to perform PWM drive.
Rfe, RFE Cfe, CFE
Cfe, CFE pin
charge/discharge current I
Frequency
(Typ.)
Comparison voltage
BD6761FS 50kΩ 1000pF 1.6V/R 16.5kHz
Drive signal shaped by the
hall amplifier
BD6762FV 20kΩ 1000pF VRFE/R 16kHz
Integration amplifier output
pin voltage
3) Booster circuit (step-up circuit) (common)
BD6761FS (Frequency = 62.5 kHz) and BD6762FV (Frequency = 125 kHz) generate the triangular waveform when the
internal oscillator generates free-run oscillation and the rectangular waveform is generated at CP1. When a capacitor is
connected between CP1 and CP2, and VG and GND, the step-up voltage is generated at VG pin. In this case, set VCC
so that VG does not exceed the absolute maximum ratings (36 V).
Triangular waveform oscillating
frequency
Charge pump voltage (VG pin
voltage)
BD6761FS 62.5 kHz VCC+6V
BD6762FV 125 kHz VCC+6.7V
4) FG amplifier (common)
Set the FG amplifier gain so that the FGOUT pin is within the range of high and low output voltage and the amplitude is
higher than the hysteresis width (250 mV: max) of the HYS amplifier.
FGSOUT pin uses an open collector format. Use in the condition as it is pulled up to the power supply with the resistor.
At this time, pay attention so that the voltage higher than 36 V is not applied to the FGSOUT pin.
5) ACC, DEC circuits (BD6761FS)
When a resistor is connected to the RCP pin and the low voltage is input to the ACC pin, the current flows out from the
CPOUT pin. When the low signal is input to the DEC pin, the current flows in to the CPOUT pin. Furthermore, when the
ACC pin and DEC pin both set to low, the current flows in to the CPOUT pin. This current can be converted to the
voltage by connecting a filter between the CPOUT and GND pins.
The voltage generated at the CPOUT pin controls the PWM's on-duty and maintains the constant motor rotation by
inputting the controlled signal to ACC and DEC pins.
6) Current limit operation
When the CL voltage (BD6761FS) and RF voltage (BD6762FV) become the current limit voltage, the current limit circuit
operates and works to limit PWM on_dutty. It also turns off the current limit circuit (current limit clear) at the peak of PWM
triangular waveform and makes the current flow again. Output current Iomax at this time are shown in the table.
Current limit current
BA6761FS Iomax=0.48/RNF [A]
BA6762FV Iomax=0.26/RNF [A]
