BD6761FS,BD6762FV
Technical Note
8/22
www.rohm.com
2010.06 - Rev.
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●I/O Logic
1)BD6761FS
Forward rotation (F/R=Low)
Input conditions Output state
Pin No.
15 17 19 3 5 7 4 6 8
HU+ HV+ HW+ UHG VHG WHG ULG VLG WLG
Condition 1 L M H H H L L L H
Condition 2 L H H H PWM L L PWM H
Condition 3 L H M H L L L H H
Condition 4 L H L H L PWM L H PWM
Condition 5 M H L H L H L H L
Condition 6 H H L PWM L H PWM H L
Condition 7 H M L L L H H H L
Condition 8 H L L L PWM H H PWM L
Condition 9 H L M L H H H L L
Condition 10 H L H L H PWM H L PWM
Condition 11 M L H L H L H L H
Condition 12 L L H PWM H L PWM L H
Reverse rotation (F/R=High)
Input conditions Output state
Pin No.
15 17 19 3 5 7 4 6 8
HU+ HV+ HW+ UHG VHG WHG ULG VLG WLG
Condition 1 L M H L L H H H L
Condition 2 L H H L PWM H H PWM L
Condition 3 L H M L H H H L L
Condition 4 L H L L H PWM H L PWM
Condition 5 M H L L H L H L H
Condition 6 H H L PWM H L PWM L H
Condition 7 H M L H H L L L H
Condition 8 H L L H PWM L L PWM H
Condition 9 H L M H L L L H H
Condition 10 H L H H L PWM L H PWM
Condition 11 M L H H L H L H L
Condition 12 L L H PWM L H PWM H L
＜Input conditions＞ ＜Output criteria＞
Hall input voltage High-side FET gate voltage
H: 3.05V L≦1V, VG-1V≦H
M: 3.0V Low-side FET gate voltage
L: 2.95V L≦1V, 9 V≦H
