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MC33664ATL1EGR2

P1-P3P4-P6P7-P9P10-P12P13-P15
MC33664
Isolated network high-speed transceiver
Rev. 1.0 — 23 May 2018 Short data sheet: technical data
1 General description
The MC33664 is a SMARTMOS transceiver physical layer transformer driver designed
to interface a microcontroller conveniently to a high speed isolated communication
network. MCU serial peripheral interface (SPI) data bits are directly converted to pulse bit
information and transferred to the bus network.
Slave response messages use the same structure to send pulse bit information to the
MC33664, which is converted and sent back to the MCU as a SPI bit stream.
2 Features and benefits
• 2.0 Mbit/s isolated network communication rate
• Dual SPI architecture for message confirmation
• Robust conducted and radiated immunity with wake-up
• 3.3 V and 5.0 V compatible logic thresholds
• Low sleep mode current with automatic bus wake-up
• Ultra-low radiated emissions
aaa-027339
MCU
MC33664
INT
3.3 V/5.0 V
SCLK_0
GPIO_0
MOSI_0
SCLK_1
GPIO_1
MOSI_1
GPIO
INTB
VIO VCC5
AGND
RDTX+
RDTX-
GNDS
GNDT
DGND
SCLK_TX
CSB_TX
DATA_TX
SCLK_RX
CSB_RX
DATA_RX
EN
5.0 V
T1
1:1
Figure 1. Typical application circuit
NXP Semiconductors
MC33664
Isolated network high-speed transceiver
MC33664_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
Short data sheet: technical data Rev. 1.0 — 23 May 2018
2 / 15
3 Applications
• Automotive communication network
• Industrial communication network
• Utility vehicle battery systems
• Forklift/mining battery systems
• Battery backup systems
4 Ordering information
Table 1. Ordering information
PackageType number
Name Description T
amb
[°C] Version
MC33664ATL1EG
[1]
SO16 plastic small outline package; 16 leads;
1.27 mm pitch; body 9.9 mm × 3.9 mm × 1.75 mm
−40 to +125 SOT109-5
[1] To order parts in tape and reel, add R2 suffix to the part number.
NXP Semiconductors
MC33664
Isolated network high-speed transceiver
MC33664_SDS All information provided in this document is subject to legal disclaimers. © NXP B.V. 2018. All rights reserved.
Short data sheet: technical data Rev. 1.0 — 23 May 2018
3 / 15
5 Pinning information
5.1 Pinning
MC33664
SCLK_TX VCC5
CSB_TX AGND
DATA_TX RDTX+
EN RDTX-
SCLK_RX GNDS
CSB_RX GNDT
DATA_RX DGND
INTB VIO
aaa-027341
1
2
3
4
5
6
7
8
10
9
12
11
14
13
16
15
Figure 2. Pin configuration for SO16
5.2 Pin description
Table 2. Pin description
Symbol Pin Type Description
SCLK_TX 1 input SPI transmit clock from the microcontroller to the MC33664
CSB_TX 2 input SPI transmit chip select from the microcontroller to the MC33664
DATA_TX 3 input SPI transmit data from the microcontroller to the MC33664
EN 4 input enable control pin for the MCU to control the MC33664 to Sleep mode or
Normal mode
SCLK_RX 5 output message receive SPI clock output to the microcontroller
CSB_RX 6 output message receive SPI chip select output to the microcontroller
DATA_RX 7 output message receive SPI data output to the microcontroller
INTB 8 output digital interrupt pin used to trigger MCU wake-ups
VIO 9 power digital 3.3 V/5.0 V power to the IC
DGND 10 ground digital ground
GNDT 11 ground terminate to ground
GNDS 12 ground substrate ground; terminate to ground
RDTX- 13 I/O transformer communication bi-directional bus
RDTX+ 14 I/O transformer communication bi-directional bus
AGND 15 ground analog ground
VCC5 16 input 5.0 V input supply
P1-P3P4-P6P7-P9P10-P12P13-P15

MC33664ATL1EGR2

Mfr. #:
Buy MC33664ATL1EGR2
Manufacturer:
NXP / Freescale
Description:
Interface - Specialized MC33664ATL1EG/SO16///REEL 13 Q1 DP
Lifecycle:
New from this manufacturer.
Delivery:
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